SAK-C167CS-LM CA+ Infineon Technologies, SAK-C167CS-LM CA+ Datasheet - Page 22

IC MCU 16BIT 25MHZ MQFP-144

SAK-C167CS-LM CA+

Manufacturer Part Number
SAK-C167CS-LM CA+
Description
IC MCU 16BIT 25MHZ MQFP-144
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAK-C167CS-LM CA+

Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Type
ROMless
Ram Size
11K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144- BSQFP
Packages
PG-MQFP-144
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
11.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
24
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
K167CSLMCAZNP
K167CSLMCAZXP
K167CSLMCAZXT
SAK-C167CS-LM CA+
SAK-C167CS-LMCAIN
SAKC167CSLMCAT
SP000103492
C167CS-4R
C167CS-L
The CPU has a register context consisting of up to 16 wordwide GPRs at its disposal.
These 16 GPRs are physically allocated within the on-chip RAM area. A Context Pointer
(CP) register determines the base address of the active register bank to be accessed by
the CPU at any time. The number of register banks is only restricted by the available
internal RAM space. For easy parameter passing, a register bank may overlap others.
A system stack of up to 1024 words is provided as a storage for temporary data. The
system stack is allocated in the on-chip RAM area, and it is accessed by the CPU via the
stack pointer (SP) register. Two separate SFRs, STKOV and STKUN, are implicitly
compared against the stack pointer value upon each stack access for the detection of a
stack overflow or underflow.
The high performance offered by the hardware implementation of the CPU can efficiently
be utilized by a programmer via the highly efficient C167CS instruction set which
includes the following instruction classes:
– Arithmetic Instructions
– Logical Instructions
– Boolean Bit Manipulation Instructions
– Compare and Loop Control Instructions
– Shift and Rotate Instructions
– Prioritize Instruction
– Data Movement Instructions
– System Stack Instructions
– Jump and Call Instructions
– Return Instructions
– System Control Instructions
– Miscellaneous Instructions
The basic instruction length is either 2 or 4 bytes. Possible operand types are bits, bytes
and words. A variety of direct, indirect or immediate addressing modes are provided to
specify the required operands.
Data Sheet
18
V2.2, 2001-08

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