T89C5115-TISUM Atmel, T89C5115-TISUM Datasheet - Page 39
T89C5115-TISUM
Manufacturer Part Number
T89C5115-TISUM
Description
IC 8051 MCU FLASH 16K 28SOIC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.T89C5115-RATIM.pdf
(113 pages)
Specifications of T89C5115-TISUM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
20
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
89C5115-TISUM
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Flash Protection from Parallel
Programming
Preventing Flash Corruption
4128G–8051–02/08
Figure 17. Reading Procedure
Note:
The three lock bits in Hardware Security Byte (See ’In-System Programming’ section)
are programmed according to Table 23 provide different level of protection for the on-
chip code and data located in FM0 and FM1.
The only way to write this bits are the parallel mode. They are set by default to level 3.
Table 23. Program Lock bit
Note:
WARNING: Security level 2, 3 and 4 should only be programmed after Flash and Core
verification.
See Section “Power Management”.
Security
Level
1
2
3
4
Program Lock bits
aa = 10 for the Hardware Security Byte.
1. Program Lock bits
U: unprogrammed
P: programmed
LB0
U
P
U
U
LB1
U
U
P
U
LB2
U
U
U
P
Protection Description
No program lock features enabled.
Parallel programming of the Flash is disabled.
Same as 2, also verify through parallel programming interface is
disabled. This is the factory defaul programming.
Same as 3
Exec: MOVC A, @A+DPTR
Flash Spaces Reading
Flash Spaces Mapping
FCON = 00000aa0b
DPTR = Address
FCON = 00h
Clear Mode
Data Read
ACC= 0
39
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