PIC18LF4685-I/P Microchip Technology, PIC18LF4685-I/P Datasheet - Page 386

IC PIC MCU FLASH 48KX16 40DIP

PIC18LF4685-I/P

Manufacturer Part Number
PIC18LF4685-I/P
Description
IC PIC MCU FLASH 48KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF4685-I/P

Core Size
8-Bit
Program Memory Size
96KB (48K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
1024Byte
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Interface Type
CAN/I2C/SPI/USART
On-chip Adc
11-chx10-bit
Number Of Timers
4
Core
PIC
Processor Series
PIC18LF
Maximum Clock Frequency
40 MHz
Data Ram Size
3.25 KB
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
11
Height
4.95 mm
Length
53.21 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
14.73 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF4685-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18LF4685-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2682/2685/4682/4685
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (k<7:0>)
2nd word(k<19:8>)
Description:
Words:
Cycles:
Example:
DS39761C-page 386
Q Cycle Activity:
After Instruction
operation
Decode
PC =
No
Q1
Read literal
Address (THERE)
operation
‘k’<7:0>,
Unconditional Branch
GOTO k
0 ≤ k ≤ 1048575
k → PC<20:1>
None
GOTO allows an unconditional branch
anywhere within entire 2-Mbyte memory
range. The 20-bit value ‘k’ is loaded into
PC<20:1>. GOTO is always a two-cycle
instruction.
2
2
GOTO THERE
1110
1111
No
Q2
k
1111
19
operation
operation
kkk
No
No
Q3
k
kkkk
7
kkk
Read literal
Write to PC
‘k’<19:8>,
operation
No
Q4
kkkk
kkkk
0
8
INCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CNT
Z
C
DC
CNT
Z
C
DC
Q1
=
=
=
=
=
=
=
=
register ‘f’
Increment f
INCF
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f) + 1 → dest
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result is
placed in W. If ‘d’ is ‘1’, the result is
placed back in register ‘f’ (default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 25.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
INCF
C, DC, N, OV, Z
Read
0010
Q2
FFh
0
?
?
00h
1
1
1
© 2009 Microchip Technology Inc.
f {,d {,a}}
10da
CNT, 1, 0
Process
Data
Q3
ffff
destination
Write to
Q4
ffff

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