LPC1113FHN33/301,5 NXP Semiconductors, LPC1113FHN33/301,5 Datasheet - Page 6
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LPC1113FHN33/301,5
Manufacturer Part Number
LPC1113FHN33/301,5
Description
IC MCU 32BIT 24KB FLASH 33HVQFN
Manufacturer
NXP Semiconductors
Series
LPC1100r
Datasheets
1.LPC1114FHN333015.pdf
(2 pages)
2.LPC1114FHN333015.pdf
(66 pages)
3.LPC1114FHN333015.pdf
(66 pages)
4.LPC1113FHN333015.pdf
(60 pages)
Specifications of LPC1113FHN33/301,5
Program Memory Type
FLASH
Program Memory Size
24KB (24K x 8)
Package / Case
33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC11
Core
ARM Cortex M0
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, SPI, UART
Number Of Programmable I/os
28
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
LPC1100
Device Core
ARM Cortex M0
Device Core Size
32b
Frequency (max)
50MHz
Total Internal Ram Size
8KB
# I/os (max)
42
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
33
Package Type
HVQFN EP
Package
33HVQFN EP
Family Name
LPC1100
Maximum Speed
50 MHz
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4951
935290776551
935290776551
NXP Semiconductors
LPC1111_12_13_14
Product data sheet
Fig 3.
PIO0_1/CLKOUT/CT32B0_MAT2
Pin configuration PLCC44 package
PIO0_2/SSEL0/CT16B0_CAP0
PIO1_8/CT16B1_CAP0
PIO2_1/DSR/SCK1
RESET/PIO0_0
XTALOUT
XTALIN
PIO2_7
PIO2_8
V
V
DD
SS
10
11
12
13
14
15
16
17
7
8
9
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 18 August 2010
LPC1114FA44/301
002aaf020
32-bit ARM Cortex-M0 microcontroller
39
38
37
36
35
34
33
32
31
30
29
R/PIO1_2/AD3/CT32B1_MAT1
R/PIO1_1/AD2/CT32B1_MAT0
R/PIO1_0/AD1/CT32B1_CAP0
R/PIO0_11/AD0/CT32B0_MAT3
PIO2_11/SCK0
PIO1_10/AD6/CT16B1_MAT1
SWCLK/PIO0_10/SCK0/CT16B0_MAT2
PIO0_9/MOSI0/CT16B0_MAT1
PIO0_8/MISO0/CT16B0_MAT0
PIO2_2/DCD/MISO1
PIO2_10
LPC1111/12/13/14
© NXP B.V. 2010. All rights reserved.
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