C8051F901-GU Silicon Laboratories Inc, C8051F901-GU Datasheet - Page 138

IC MCU 8BIT 8KB FLASH 24QSOP

C8051F901-GU

Manufacturer Part Number
C8051F901-GU
Description
IC MCU 8BIT 8KB FLASH 24QSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F901-GU

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QSOP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 15x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
768 B
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F912DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
24QSOP
Device Core
8051
Family Name
C8051F90x
Maximum Speed
25 MHz
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1847-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F901-GU
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
C8051F91x-C8051F90x
13.5.2. PSWE Maintenance
13.5.3. System Clock
Additional Flash recommendations and example code can be found in “AN201: Writing to Flash from
Firmware", available from the Silicon Laboratories web site.
138
7. Reduce the number of places in code where the PSWE bit (b0 in PSCTL) is set to a 1. There
8. Minimize the number of variable accesses while PSWE is set to a 1. Handle pointer address
9. Disable interrupts prior to setting PSWE to a 1 and leave them disabled until after PSWE has
10. Make certain that the Flash write and erase pointer variables are not located in XRAM. See
11. Add address bounds checking to the routines that write or erase Flash memory to ensure that
12. If operating from an external crystal, be advised that crystal performance is susceptible to
13. If operating from the external oscillator, switch to the internal oscillator during Flash write or
should be exactly one routine in code that sets PSWE to a 1 to write Flash bytes and one rou-
tine in code that sets both PSWE and PSEE both to a 1 to erase Flash pages.
updates and loop maintenance outside the "PSWE = 1;... PSWE = 0;" area. Code examples
showing this can be found in AN201, "Writing to Flash from Firmware", available from the Sili-
con Laboratories web site.
been reset to 0. Any interrupts posted during the Flash write or erase operation will be ser-
viced in priority order after the Flash operation has been completed and interrupts have been
re-enabled by software.
your compiler documentation for instructions regarding how to explicitly locate variables in dif-
ferent memory areas.
a routine called with an illegal address does not result in modification of the Flash.
electrical interference and is sensitive to layout and to changes in temperature. If the system is
operating in an electrically noisy environment, use the internal oscillator or use an external
CMOS clock.
erase operations. The external oscillator can continue to run, and the CPU can switch back to
the external oscillator after the Flash operation has completed.
Rev. 1.0

Related parts for C8051F901-GU