MC908AZ60AMFUE Freescale Semiconductor, MC908AZ60AMFUE Datasheet - Page 256

• Manufacturer Part Number: MC908AZ60AMFUE
• Description: IC MCU FLASH 8.4MHZ 60K 64QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60AMFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Operating Supply Voltage: 5 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Package: 64PQFP
• Family Name: HC08
• Maximum Speed: 8.4 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Input/Output Ports
22.5 Port D
Port D is an 8-bit general-purpose I/O port. Note that PTD7 is only available on 64-pin package options.
22.5.1 Port D Data Register
Port D is a 8-bit special function port that shares seven of its pins with the analog to digital converter and
two with the timer interface modules.
PTD[7:0] — Port D Data Bits
ATD[14:8] — ADC Channel Status Bits
TACLK/TBCLK — Timer Clock Input Bit
256
PTD[7:0] are read/write, software programmable bits. Data direction of PTD[7:0] pins are under the
control of the corresponding bit in data direction register D.
PTD6/ATD14/TACLK–PTD0/ATD8 are seven of the 15 analog-to-digital converter channels. The ADC
channel select bits, CH[4:0], determine whether the PTD6/ATD14/TACLK–PTD0/ATD8 pins are ADC
channels or general-purpose I/O pins. If an ADC channel is selected and a read of this corresponding
bit in the port B data register occurs, the data will be 0 if the data direction for this bit is programmed
as an input. Otherwise, the data will reflect the value in the data latch. (See
Analog-to-Digital Converter
The PTD6/ATD14/TACLK pin is the external clock input for the TIMA. The PTD4/ATD12/TBCLK pin is
the external clock input for the TIMB. The prescaler select bits, PS[2:0], select PTD6/ATD14/TACLK
or PTD4/ATD12/TBCLK as the TIM clock input. (See
Registers
clock, PTD6/ATD14/TACLK
TACLK/TBCLK are selected corresponding DDRD bits have no effect.
Alternative
and
Functions:
Address:
Data direction register D (DDRD) does not affect the data direction of port
D pins that are being used by the TIMA or TIMB. However, the DDRD bits
always determine whether reading port D returns the states of the latches
or a 0.
Reset:
Read:
Write:
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
20.8.4 TIMB Channel Status and Control
$0003
PTD7
Bit 7
Figure 22-11. Port D Data Register (PTD)
(ADC)).
and
ATD14
TACLK
PTD6
6
PTD4/ATD12/TBCLK are available for general-purpose I/O. While
ATD13
PTD5
5
NOTE
TBCLK
Unaffected by Reset
ATD12
PTD4
4
25.8.4 TIMA Channel Status and Control
ATD11
Registers). When not selected as the TIM
PTD3
3
ATD10
PTD2
2
PTD1
ATD9
1
Chapter 26
Freescale Semiconductor
PTD0
ATD8
Bit 0