MC908AZ60AMFUE Freescale Semiconductor, MC908AZ60AMFUE Datasheet - Page 42

• Manufacturer Part Number: MC908AZ60AMFUE
• Description: IC MCU FLASH 8.4MHZ 60K 64QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60AMFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Operating Supply Voltage: 5 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Package: 64PQFP
• Family Name: HC08
• Maximum Speed: 8.4 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Memory Map
42
Addr.
$003A
$003B
$003C
$003D
$003E
$003F
$0032
$0033
$0034
$0035
$0036
$0037
$0038
$0039
$0040
$0041
$0042
and Control Register (TASC4)
and Control Register (TASC5)
Analog-to-Digital Input Clock
BDLC Analog and Roundtrip
Analog-to-Digital Status and
BDLC State Vector Register
Timer A Channel 4 Register
Timer A Channel 4 Register
Timer A Channel 5 Register
Timer A Channel 5 Register
Timer B Status and Control
Control Register (ADSCR)
Timer A Channel 4 Status
Timer A Channel 5 Status
Timer B Counter Register
Timer B Counter Register
BDLC Control Register 1
BDLC Control Register 2
Register Name
Delay Register (BARD)
Analog-to-Digital Data
BDLC Data Register
Register (ADICLK)
Register (TBSCR)
High (TBCNTH)
High (TACH4H)
High (TACH5H)
Register (ADR)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Low (TBCNTL)
Low (TACH4L)
Low (TACH5L)
Figure 2-2. I/O Data, Status and Control Registers (Sheet 4 of 5)
(BSVR)
(BCR1)
(BCR2)
(BDR)
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
ALOOP
COCO
ADIV2
Bit 7
CH4F
CH5F
Bit 15
Bit 15
IMSG
Bit 15
Bit 7
Bit 7
AD7
BD7
TOF
Bit 7
ATE
R
R
0
0
0
0
= Unimplemented
RXPOL
DLOOP
CH4IE
CH5IE
ADIV1
CLKS
AIEN
TOIE
AD6
BD6
14
14
14
6
R
6
6
0
6
RX4XE
TSTOP
ADCO
ADIV0
MS4B
AD5
BD5
R1
13
13
13
5
R
R
I3
R
5
0
5
0
5
ADICLK
ADCH4
MS4A
MS5A
NBFS
TRST
AD4
BD4
R0
12
12
12
R
I2
R
4
4
4
0
0
4
ADCH3
ELS4B
ELS5B
TEOD
AD3
BO3
BD3
11
11
11
R
I1
R
R
3
R
3
3
0
0
0
3
= Reserved
ADCH2
ELS4A
ELS5A
TSIFR
AD2
BO2
BD2
PS2
10
10
10
I0
2
R
R
2
2
0
0
2
Freescale Semiconductor
TMIFR1
ADCH1
TOV4
TOV5
AD1
BO1
BD1
PS1
IE
1
R
9
1
9
1
0
0
9
1
CH4MAX
CH5MAX
TMIFR0
ADCH0
Bit 0
WCM
Bit 8
Bit 0
Bit 8
Bit 0
AD0
BO0
BD0
Bit 8
Bit 0
PS0
R
0
0