PIC18F65J15T-I/PT Microchip Technology, PIC18F65J15T-I/PT Datasheet - Page 124

IC PIC MCU FLASH 24KX16 64TQFP

PIC18F65J15T-I/PT

Manufacturer Part Number
PIC18F65J15T-I/PT
Description
IC PIC MCU FLASH 24KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F65J15T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
For Use With
MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18F65J15T-I/PT
PIC18F65J15T-I/PTTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F65J15T-I/PT
Manufacturer:
FAIRCHILD
Quantity:
100
Part Number:
PIC18F65J15T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F87J10 FAMILY
REGISTER 10-12: IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
DS39663F-page 122
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSP2IP
R/W-1
SSP2IP: Master Synchronous Serial Port 2 Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP: Bus Collision Interrupt Priority bit (MSSP2 module)
1 = High priority
0 = Low priority
RC2IP: EUSART2 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TX2IP: EUSART2 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
TMR4IE: TMR4 to PR4 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP5IP: CCP5 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP4IP: CCP4 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP3IP: ECCP3 Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP
R/W-1
W = Writable bit
‘1’ = Bit is set
RC2IP
R/W-1
R/W-1
TX2IP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TMR4IP
R/W-1
CCP5IP
R/W-1
© 2009 Microchip Technology Inc.
x = Bit is unknown
CCP4IP
R/W-1
CCP3IP
R/W-1
bit 0

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