PIC16F819-I/SOTSL Microchip Technology, PIC16F819-I/SOTSL Datasheet - Page 429
![IC PIC MCU FLASH 2KX14 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F819-I/SOTSL
Manufacturer Part Number
PIC16F819-I/SOTSL
Description
IC PIC MCU FLASH 2KX14 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(176 pages)
4.PIC16F818-ISO.pdf
(6 pages)
5.PIC16F818-ISO.pdf
(8 pages)
6.PIC16F818-ISO.pdf
(8 pages)
Specifications of PIC16F819-I/SOTSL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC16F818-ISO PDF datasheet #5
- PIC16F818-ISO PDF datasheet #6
- Current page: 429 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
Legend C
V
AIN
Rs
V
I
R
SS
C
LEAKAGE
T
PIN
IC
HOLD
ANx
C
5 pF
Now to get an idea what happens to the acquisition time when the source impedance is a mini-
mal value ( R
the source impedance made a minimal value ( R
Example 23-2:
Figure 23-3: Analog Input Model
PIN
T
Temperature coefficient is only required for temperatures > 25 C.
T
T
T
ACQ
ACQ
C
ACQ
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
Note 1: The reference voltage (V
Note 2: The charge holding capacitor (C
Note 3: The maximum recommended impedance for analog sources is 10 k . This is
Note 4: After a conversion has completed, a 2.0T
=
various junctions
=
=
=
Section 23. 10-bit A/D Converter
out.
required to meet the pin leakage specification.
can begin again. During this time the holding capacitor is not connected to the
selected A/D input channel.
S
T
2 s + Tc + [(Temp - 25 C)(0.05 s/ C)]
-C
-120 pF (1 k + 7 k + 50 ) ln(0.0004885)
-120 pF (8050 ) ln(0.0004885)
-0.966 s (-7.6241)
7.36 s
2 s + 16.47 s + [(50 C - 25 C)(0.05 s/ C)]
9.36 s + 1.25 s
10.61 s
= 50
AMP
V
HOLD
DD
Calculating the Minimum Required Acquisition Time (Case 2)
V
+ T
V
).
T
T
(R
Example 23-2
= 0.6V
= 0.6V
C
IC
+ T
+ R
Preliminary
COFF
SS
+ R
I leakage
100 nA
REF
shows the same conditions as in
S
R
) ln(1/2047)
IC
) has no effect on the equation, since it cancels itself
HOLD
1k
S
V
) is not discharged after each conversion.
= 50 ).
SS
DD
Sampling
Switch
AD
6V
5V
4V
3V
2V
R
delay must complete before acquisition
SS
Sampling Switch
5 6 7 8 9 10 11
V
SS
C
( k )
HOLD
Example 23-1
= 120 pF
DS31023A-page 23-7
with only
23
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