PIC16F819-I/SOTSL Microchip Technology, PIC16F819-I/SOTSL Datasheet - Page 445
![IC PIC MCU FLASH 2KX14 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F819-I/SOTSL
Manufacturer Part Number
PIC16F819-I/SOTSL
Description
IC PIC MCU FLASH 2KX14 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(176 pages)
4.PIC16F818-ISO.pdf
(6 pages)
5.PIC16F818-ISO.pdf
(8 pages)
6.PIC16F818-ISO.pdf
(8 pages)
Specifications of PIC16F819-I/SOTSL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC16F818-ISO PDF datasheet #5
- PIC16F818-ISO PDF datasheet #6
- Current page: 445 of 688
- Download datasheet (3Mb)
24.2
1997 Microchip Technology Inc.
Control Registers
bit 7-4:
bit 3:
bit 2:
bit 1:
bit 0:
Two A/D control registers are provided to control the conversion process. They are ADCON0 and
ADCON1. Both registers are readable and writable.
Register 24-1: ADCON0 Register
ADCS3:ADCS0: Analog Channel Select bits
0000 = AN0 input
0001 = AN1 input
0010 = AN2 input
0011 = AN3 input
0100 = Bandgap reference voltage input
0101 = Slope reference SREFHI input
0110 = Slope reference SREFLO input
0111 = AN11 input
1000 = AN12 input
1001 = AN13 input
1010 = AN4 input
1011 = AN5 input
1100 = AN6 input
1101 = AN7 input
1110 = AN14 input
1111 = AN15 input
Unimplemented: Read as '0'
AMUXOE: Analog MUX Output Enable
1 = Connect AMUX Output to AN0 pin (overrides TRIS setting)
0 = AN0 pin normal
ADRST: A/D Reset Control Bit
1 = Stop the A/D Timer, discharge CDAC capacitor
0 = Normal operation (A/D running)
ADZERO: A/D Zero Select Control
1 = Enable zeroing operation on AN1 and AN5
0 = Normal operation, sample AN1 and AN5 pins
bit 7
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
ADCS3
R/W-0
Note:
For devices that do not use the full 16 A/D input channels, the unimplemented selec-
tions are reserved. Do not select any unimplemented channels.
ADCS2
R/W-0
W = Writable bit
ADCS1
R/W-0
Section 24. Slope A/D
ADCS0
R/W-0
U-0
- n = Value at POR reset
—
AMUXOE
R/W-0
ADRST
R/W-1
DS31024A-page 24-3
bit 0
ADZERO
R/W-0
24
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