ATMEGA168P-20PU Atmel, ATMEGA168P-20PU Datasheet - Page 142
![MCU AVR 16K FLASH 20MHZ 28-PDIP](/photos/7/21/72189/453-28-dip_sml.jpg)
ATMEGA168P-20PU
Manufacturer Part Number
ATMEGA168P-20PU
Description
MCU AVR 16K FLASH 20MHZ 28-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA168P-20PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
No. Of Timers
3
Rohs Compliant
Yes
Data Rom Size
512 B
A/d Bit Size
10 bit
A/d Channels Available
6
Height
4.57 mm
Length
34.8 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7.49 mm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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17. 8-bit Timer/Counter2 with PWM and Asynchronous Operation
17.1
17.2
8025L–AVR–7/10
Features
Overview
•
•
•
•
•
•
•
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. A simplified
block diagram of the 8-bit Timer/Counter is shown in
I/O pins, refer to
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
tions are listed in the
The PRTIM2 bit in
enable Timer/Counter2 module.
Figure 17-1. 8-bit Timer/Counter Block Diagram
Single Channel Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV2, OCF2A and OCF2B)
Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
”Pinout ATmega48P/88P/168P” on page
”Minimizing Power Consumption” on page 43
”Register Description” on page
Timer/Counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
Direction
Count
Clear
Control Logic
TOP
=
TCCRnB
Value
BOTTOM
Fixed
TOP
clk
=
156.
Tn
ATmega48P/88P/168P
0
Figure
2. CPU accessible I/O Registers,
17-1. For the actual placement of
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
Waveform
Waveform
( From Prescaler )
Detector
Edge
must be written to zero to
OCnA
OCnB
Tn
142
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