PIC16F818-I/P Microchip Technology, PIC16F818-I/P Datasheet - Page 88

IC MCU FLASH 1KX14 18-DIP

PIC16F818-I/P

Manufacturer Part Number
PIC16F818-I/P
Description
IC MCU FLASH 1KX14 18-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F818-I/P

Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C/SPI/SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
5-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ACICE0202 - ADAPTER MPLABICE 18P 300 MILAC164010 - MODULE SKT PROMATEII DIP/SOIC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F818-I/P
Manufacturer:
Microchip Technology
Quantity:
295
PICmicro MID-RANGE MCU FAMILY
5.6
DS31005A-page 5-6
STATUS Register
The STATUS register, shown in
status and the bank select bits for data memory. Since the selection of the Data Memory banks
is controlled by this register, it is required to be present in every bank. Also, this register is in the
same relative position (offset) in each bank (see
ory Organization”
The STATUS register can be the destination for any instruction, as with any other register. If the
STATUS register is the destination for an instruction that affects the Z, DC or C bits, then the write
to these three bits is disabled. These bits are set or cleared according to the device logic. Fur-
thermore, the TO and PD bits are not writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than intended.
For example, CLRF STATUS will clear the upper-three bits and set the Z bit. This leaves the
STATUS register as 000u u1uu (where u = unchanged).
It is recommended, therefore, that only BCF, BSF, SWAPF and MOVWF instructions are used to
alter the STATUS register because these instructions do not affect the Z, C or DC bits from the
STATUS register. For other instructions, not affecting any status bits, see
Note 1: Some devices do not require the IRP and RP1 (STATUS<7:6>) bits. These bits are
Note 2: The C and DC bits operate as a borrow and digit borrow bit, respectively, in subtrac-
not used by the Section 5. CPU and ALU and should be maintained clear. Use of
these bits as general purpose R/W bits is NOT recommended, since this may affect
upward code compatibility with future products.
tion.
section).
Figure
5-1, contains the arithmetic status of the ALU, the RESET
Figure 6-5: “Register File Map”
1997 Microchip Technology Inc.
Table
5-1.
in the
“Mem-

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