ATA6612P-PLPW Atmel, ATA6612P-PLPW Datasheet - Page 312
![MCU W/LIN TXRX REG WTCHDG 48-QFN](/photos/6/82/68297/48-qfn_sml.jpg)
ATA6612P-PLPW
Manufacturer Part Number
ATA6612P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6612P-PLPW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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6.24.7.11
6.24.7.12
312
Atmel ATA6612/ATA6613
Programming the Lock Bits
Reading the Fuse and Lock Bits
Figure 6-121. Programming the FUSES Waveforms
The algorithm for programming the Lock bits is as follows (refer to
page 307
The Lock bits can only be cleared by executing Chip Erase.
The algorithm for reading the Fuse and Lock bits is as follows (refer to
Flash” on page 307
RESET +12V
1. A: Load Command “0010 0000”.
2. C: Load Data Low Byte. Bit n = “0” programs the Lock bit. If LB mode 3 is pro-
3. Give WR a negative pulse and wait for RDY/BSY to go high.
1. A: Load Command “0000 0100”.
2. Set OE to “0”, BS2 to “0” and BS1 to “0”. The status of the Fuse Low bits can now be
3. Set OE to “0”, BS2 to “1” and BS1 to “1”. The status of the Fuse High bits can now be
4. Set OE to “0”, BS2 to “1”, and BS1 to “0”. The status of the Extended Fuse bits can
5. Set OE to “0”, BS2 to “0” and BS1 to “1”. The status of the Lock bits can now be read
6. Set OE to “1”.
RDY/BSY
PAGEL
XTAL1
DATA
grammed (LB1 and LB2 is programmed), it is not possible to program the Boot Lock
bits by any External Programming mode.
read at DATA (“0” means programmed).
read at DATA (“0” means programmed).
now be read at DATA (“0” means programmed).
at DATA (“0” means programmed).
BS2
XA1
XA0
BS1
WR
OE
for details on Command and Data loading):
0x40
A
DATA
C
for details on Command loading):
Write Fuse Low byte
XX
0x40
A
DATA
C
Write Fuse high byte
XX
“Programming the Flash” on
0x40
A
DATA
C
“Programming the
Write Extended Fuse byte
XX
9111H–AUTO–01/11
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