PIC18LF45K22-I/ML Microchip Technology, PIC18LF45K22-I/ML Datasheet - Page 130

• Manufacturer Part Number: PIC18LF45K22-I/ML
• Description: MCU 8BIT 32KB FLASH 3.6V 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF45K22-I/ML

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1536Byte
• Cpu Speed: 64MHz
• No. Of Timers: 7
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: I2C, SPI, EUSART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 7
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 28 Channel
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18(L)F2X/4XK22
REGISTER 9-17:
REGISTER 9-18:
DS41412D-page 130
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2
bit 1
bit 0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
CCP5IP: CCP5 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP4IP: CCP4 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP3IP: CCP3 Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
TMR6IP: TMR6 to PR6 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5IP: TMR5 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
TMR4IP: TMR4 to PR4 Match Interrupt Priority bit
1 = High priority
0 = Low priority
U-0
U-0
—
—
IPR4: PERIPHERAL INTERRUPT PRIORITY REGISTER 4
IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
U-0
U-0
—
—
U-0
U-0
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
CCP5IP
TMR6IP
R/W-0
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
CCP4IP
TMR5IP
R/W-0
R/W-0
CCP3IP
TMR4IP
R/W-0
R/W-0
bit 0
bit 0