PIC18LF45K22-I/ML Microchip Technology, PIC18LF45K22-I/ML Datasheet - Page 55

MCU 8BIT 32KB FLASH 3.6V 44QFN

PIC18LF45K22-I/ML

Manufacturer Part Number
PIC18LF45K22-I/ML
Description
MCU 8BIT 32KB FLASH 3.6V 44QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18LF45K22-I/ML

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
1536Byte
Cpu Speed
64MHz
No. Of Timers
7
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 28 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
TABLE 3-3:
 2010 Microchip Technology Inc.
Note 1:
T1OSC or LFINTOSC
Primary Device Clock
2:
3:
4:
(PRI_IDLE mode)
before Wake-up
Clock Source
HFINTOSC
(Sleep mode)
T
required delays (see
Includes both the HFINTOSC 16 MHz source and postscaler derived frequencies.
T
Execution continues during the HFINTOSC stabilization period, T
CSD
OST
None
is the Oscillator Start-up Timer. t
is a required delay when waking from Sleep and all Idle modes and runs concurrently with any other
EXIT DELAY ON WAKE-UP BY RESET FROM SLEEP MODE OR ANY IDLE MODE
(BY CLOCK SOURCES)
(2)
(1)
Section 3.4 “Idle
after Wake-up
Clock Source
HFINTOSC
HFINTOSC
HFINTOSC
HFINTOSC
LP, XT, HS
LP, XT, HS
LP, XT, HS
LP, XT, HS
EC, RC
EC, RC
EC, RC
EC, RC
HSPLL
HSPLL
HSPLL
HSPLL
PLL
Preliminary
Modes”). On Reset, HFINTOSC defaults to 1 MHz.
is the PLL Lock-out Timer.
(2)
(1)
(1)
(1)
PIC18(L)F2X/4XK22
T
T
T
OST
OST
OST
Exit Delay
T
T
T
T
T
T
T
T
T
IOBST
IOBST
IOBST
None
CSD
OST
CSD
OST
CSD
OST
CSD
+ t
+ t
+ t
(1)
(3)
PLL
(1)
(4)
PLL
(1)
(3)
PLL
(1)
.
(4)
(4)
(3)
(3)
(3)
Clock Ready Status
Bit (OSCCON)
DS41412D-page 55
OSTS
OSTS
OSTS
OSTS
IOSF
IOSF
IOSF
IOSF

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