PIC18LF45K22-I/ML Microchip Technology, PIC18LF45K22-I/ML Datasheet - Page 358
![MCU 8BIT 32KB FLASH 3.6V 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF45K22-I/ML
Manufacturer Part Number
PIC18LF45K22-I/ML
Description
MCU 8BIT 32KB FLASH 3.6V 44QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18LF45K22-I/ML
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
1536Byte
Cpu Speed
64MHz
No. Of Timers
7
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 28 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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PIC18(L)F2X/4XK22
REGISTER 24-11: CONFIG7H: CONFIGURATION REGISTER 7 HIGH
REGISTER 24-12: DEVID1: DEVICE ID REGISTER 1
REGISTER 24-13: DEVID2: DEVICE ID REGISTER 2
DS41412D-page 358
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5-0
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-5
bit 4-0
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-0
DEV10
DEV2
U-0
—
R
R
Unimplemented: Read as ‘0’
EBTRB: Boot Block Table Read Protection bit
1 = Boot Block not protected from table reads executed in other blocks
0 = Boot Block protected from table reads executed in other blocks
Unimplemented: Read as ‘0’
DEV<2:0>: Device ID bits
These bits, together with DEV<10:3> in DEVID2, determine the device ID.
REV<4:0>: Revision ID bits
These bits indicate the device revision.
DEV<10:3>: Device ID bits
These bits, together with DEV<2:0> in DEVID1, determine the device ID.
See
See
EBTRB
R/C-1
DEV1
DEV9
Table 24-2
Table 24-2
R
R
for complete Device ID list.
for complete Device ID list.
DEV0
DEV8
U-0
—
R
R
REV4
DEV7
U-0
Preliminary
—
R
R
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
REV3
DEV6
U-0
—
R
R
REV2
DEV5
U-0
—
R
R
2010 Microchip Technology Inc.
REV1
DEV4
U-0
—
R
R
REV0
DEV3
U-0
—
R
R
bit 0
bit 0
bit 0
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