AT90PWM316-16SU Atmel, AT90PWM316-16SU Datasheet - Page 162

• Manufacturer Part Number: AT90PWM316-16SU
• Description: MCU AVR 16K ISP FLSH 16MHZ32SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM316-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• Package: 32SOIC
• Device Core: AVR
• Family Name: 90P
• Maximum Speed: 16 MHz
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.24 Interrupts
16.24.1
16.24.2
16.25 PSC Register Definition
162
AT90PWM216/316
List of Interrupt Vector
PSC Interrupt Vectors in AT90PWM216/316
Table 16-9.
T h i s s e c t i o n d e s c r i b e s t h e s p e c i f i c s o f t h e i n t e r r u p t h a n d l i n g a s p e r f o r m e d i n
AT90PWM216/316.
Each PSC provides 2 interrupt vectors
See PSCn Interrupt Mask Register
Table 16-10. PSC Interrupt Vectors
Registers are explained for PSC0. They are identical for PSC1. For PSC2 only different registers
are described.
PCLKSELn
0
0
0
0
1
1
1
1
• PSCn EC (End of Cycle): When enabled and when a match with OCRnRB occurs
• PSCn CAPT (Capture Event): When enabled and one of the two following events occurs :
Vector
retrigger, capture of the PSC counter or Synchro Error.
No.
2
3
4
5
6
7
-
-
Program
Address
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
Output Clock versus Selection and Prescaler
-
-
PPREn1
0
0
1
1
0
0
1
1
Source
PSC2 CAPT
PSC2 EC
PSC1 CAPT
PSC1 EC
PSC0 CAPT
PSC0 EC
-
-
page 172
PPREn0
0
1
0
1
0
1
0
1
Interrupt Definition
-
PSC2 Capture Event or Synchronization Error
PSC2 End Cycle
PSC1 Capture Event or Synchronization Error
PSC1 End Cycle
PSC0 Capture Event or Synchronization Error
PSC0 End Cycle
-
and PSCn Interrupt Flag Register
CLKPSCn output
CLK I/O
CLK I/O / 4
CLK I/O / 32
CLK I/O / 256
CLK PLL
CLK PLL / 4
CLK PLL / 32
CLK PLL / 256
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