PIC18LF2221-I/SS Microchip Technology, PIC18LF2221-I/SS Datasheet - Page 136

• Manufacturer Part Number: PIC18LF2221-I/SS
• Description: IC PIC MCU FLASH 2KX16 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2221-I/SS

• Core Size: 8-Bit
• Program Memory Size: 4KB (2K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F4321 FAMILY
13.2
Timer2 can also generate an optional device interrupt.
The Timer2 output signal (TMR2-to-PR2 match)
provides the input for the 4-bit output counter/
postscaler. This counter generates the TMR2 match
interrupt flag which is latched in TMR2IF (PIR1<1>).
The interrupt is enabled by setting the TMR2 Match
Interrupt Enable bit, TMR2IE (PIE1<1>).
A range of 16 postscale options (from 1:1 through 1:16
inclusive) can be selected with the postscaler control
bits, T2OUTPS3:T2OUTPS0 (T2CON<6:3>).
FIGURE 13-1:
TABLE 13-1:
DS39689A-page 134
INTCON GIE/GIEH PEIE/GIEL
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module.
Note 1:
Name
T2OUTPS3:T2OUTPS0
T2CKPS1:T2CKPS0
F
OSC
Timer2 Interrupt
/4
Timer2 Register
Timer2 Period Register
These bits are unimplemented on 28-pin devices and read as ‘0’.
PSPIF
PSPIE
PSPIP
Bit 7
—
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
(1)
(1)
(1)
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
TIMER2 BLOCK DIAGRAM
Internal Data Bus
1:1, 1:4, 1:16
ADIF
ADIE
ADIP
Bit 6
2
Prescaler
TMR0IE
RCIE
RCIP
RCIF
Bit 5
Advance Information
4
TMR2
INT0IE
TXIE
TXIP
Bit 4
TXIF
Reset
8
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
13.3
The unscaled output of TMR2 is available primarily to
the CCP modules, where it is used as a time base for
operations in PWM mode.
Timer2 can be optionally used as the shift clock source
for the MSSP module operating in SPI mode.
Additional information is provided in Section 17.0
“Master Synchronous Serial Port (MSSP) Module”.
Comparator
1:1 to 1:16
Postscaler
8
TMR2/PR2
Match
Timer2 Output
TMR0IF
CCP1IF
CCP1IE
CCP1IP
Bit 2
TMR2IF
TMR2IE
TMR2IP
INT0IF
© 2005 Microchip Technology Inc.
Bit 1
PR2
8
Set TMR2IF
TMR2 Output
(to PWM or MSSP)
TMR1IF
TMR1IE
TMR1IP
RBIF
Bit 0
on page
Values
Reset
49
52
52
52
50
50
50