PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 164

• Manufacturer Part Number: PIC18F65J90-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J90-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 51
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F85J90 FAMILY
16.1
The LCD driver module has 33 registers:
• LCD Control Register (LCDCON)
• LCD Phase Register (LCDPS)
• LCD Regulator Control Register (LCDREG)
• Six LCD Segment Enable Registers
• 24 LCD Data Registers
16.1.1
The LCDCON register, shown in Register 16-1,
controls the overall operation of the module. Once the
module is configured, the LCDEN (LCDCON<7>) bit is
used to enable or disable the LCD module. The LCD
panel can also operate during Sleep by clearing the
SLPEN (LCDCON<6>) bit.
REGISTER 16-1:
DS39770C-page 164
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1-0
(LCDSE5:LCDSE0)
(LCDDATA23:LCDDATA0)
LCDEN
R/W-0
LCD Registers
LCD CONTROL REGISTERS
LCDEN: LCD Driver Enable bit
1 = LCD driver module is enabled
0 = LCD driver module is disabled
SLPEN: LCD Driver Enable in Sleep mode bit
1 = LCD driver module is disabled in Sleep mode
0 = LCD driver module is enabled in Sleep mode
WERR: LCD Write Failed Error bit
1 = LCDDATAx register written while LCDPS<4> = 0 (must be cleared in software)
0 = No LCD write error
Unimplemented: Read as ‘0’
CS<1:0>: Clock Source Select bits
1x = INTRC (31 kHz)
01 = T13CKI (Timer1)
00 = System clock (F
LMUX<1:0>: Commons Select bits
LMUX<1:0>
SLPEN
R/W-0
00
01
10
11
LCDCON: LCD CONTROL REGISTER
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
1/2 (COM1:COM0)
1/3 (COM2:COM0)
1/4 (COM3:COM0)
WERR
Multiplex Type
R/C-0
Static (COM0)
OSC
/4)
U-0
—
PIC18F6XJ90
Maximum Number of Pixels:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
132
33
66
99
R/W-0
The
configures the LCD clock source prescaler and the type
of waveform: Type-A or Type-B. Details on these
features are provided in Section 16.2 “LCD Clock
Source”, Section 16.3 “LCD Bias Generation” and
Section 16.8 “LCD Waveform Generation”.
The LCDREG register is described in Section 16.3
“LCD Bias Generation”.
The LCD Segment Enable registers (LCDSEx)
configure the functions of the port pins. Setting the
segment enable bit for a particular segment configures
that pin as an LCD driver. The prototype LCDSE
register is shown in Register 16-3. There are six
LCDSE
Table 16-1.
CS1
LCDPS
PIC18F8XJ90
registers
R/W-0
144
192
CS0
48
96
register,
(LCDSE5:LCDSE0)
 2010 Microchip Technology Inc.
x = Bit is unknown
shown
LMUX1
R/W-0
Bias Type
1/2 or 1/3
1/2 or 1/3
in
Static
1/3
Register 16-2,
LMUX0
R/W-0
listed
bit 0
in