ATMEGA3250P-20AUR Atmel, ATMEGA3250P-20AUR Datasheet - Page 19

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ATMEGA3250P-20AUR

Manufacturer Part Number
ATMEGA3250P-20AUR
Description
MCU AVR 32K FLASH 20MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA3250P-20AUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA3250P-20AUR
Manufacturer:
Atmel
Quantity:
10 000
7. AVR Memories
7.1
7.2
8023F–AVR–07/09
Overview
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega325P/3250P. The AVR architecture
has two main memory spaces, the Data Memory and the Program Memory space. In addition,
the ATmega325P/3250P features an EEPROM Memory for data storage. All three memory
spaces are linear.
The ATmega325P/3250P contains 32K bytes On-chip In-System Reprogrammable Flash mem-
ory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized
as 16K x 16. For software security, the Flash Program memory space is divided into two sec-
tions, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega325P/3250P Program Counter (PC) is 14 bits wide, thus addressing the 16K program
memory locations. The operation of Boot Program section and associated Boot Lock bits for
software protection are described in detail in
gramming” on page
on Flash data serial downloading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
16.
256.
”Memory Programming” on page 271
”Boot Loader Support – Read-While-Write Self-Pro-
ATmega325P/3250P
contains a detailed description
”Instruction Execution Tim-
19

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