DSPIC33FJ12MC202-I/SP Microchip Technology, DSPIC33FJ12MC202-I/SP Datasheet - Page 36
![IC DSPIC MCU/DSP 12K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC33FJ12MC202-I/SP
Manufacturer Part Number
DSPIC33FJ12MC202-I/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ12MC201-ISO.pdf
(288 pages)
3.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
4.DSPIC33FJ12MC202-IML.pdf
(282 pages)
Specifications of DSPIC33FJ12MC202-I/SP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- PIC24HJ12GP201-ISO PDF datasheet
- DSPIC33FJ12MC201-ISO PDF datasheet #2
- DSPIC33FJ12MC201-ISO PDF datasheet #3
- DSPIC33FJ12MC202-IML PDF datasheet #4
- Current page: 36 of 282
- Download datasheet (4Mb)
TABLE 3-13:
TABLE 3-14:
SFR Name
U1MODE
U1STA
U1TXREG
U1RXREG
U1BRG
Legend:
SPI1STAT
SPI1CON1
SPI1CON2
SPI1BUF
Legend:
Name
SFR
Addr
Addr
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
0240
0242
0244
0248
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
0220
0222
0224
0226
0228
SFR
SFR
UART1 REGISTER MAP
SPI1 REGISTER MAP
UTXISEL1
FRMEN
SPIEN
UARTEN
Bit 15
Bit 15
—
—
—
SPIFSD
UTXINV UTXISEL0
Bit 14
Bit 14
—
—
—
—
—
FRMPOL
SPISIDL
Bit 13
USIDL
Bit 13
—
—
—
DISSCK
Bit 12
IREN
Bit 12
—
—
—
—
—
UTXBRK
RTSMD
DISSDO
Bit 11
Bit 11
—
—
—
—
UTXEN
MODE16
Bit 10
Bit 10
—
—
—
—
—
UTXBF
SPI1 Transmit and Receive Buffer Register
UEN1
Bit 9
—
—
Bit 9
SMP
—
—
Baud Rate Generator Prescaler
UEN0
TRMT
Bit 8
Bit 8
CKE
—
—
WAKE
Bit 7
URXISEL<1:0>
SSEN
Bit 7
—
—
LPBACK
SPIROV
Bit 6
Bit 6
CKP
—
ABAUD
ADDEN
MSTEN
Bit 5
Bit 5
UART Transmit Register
UART Receive Register
—
—
URXINV
RIDLE
Bit 4
Bit 4
—
—
SPRE<2:0>
BRGH
PERR
Bit 3
Bit 3
—
—
FERR
Bit 2
Bit 2
PDSEL<1:0>
—
—
FRMDLY
OERR
SPITBF
Bit 1
Bit 1
PPRE<1:0>
URXDA
STSEL
SPIRBF
Bit 0
Bit 0
—
Resets
Resets
0000
0110
xxxx
0000
0000
0000
0000
0000
0000
All
All
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