AT32UC3L064-AUR Atmel, AT32UC3L064-AUR Datasheet - Page 59

• Manufacturer Part Number: AT32UC3L064-AUR
• Description: IC MCU AVR32 64K FLASH 48TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3L064-AUR

• Package / Case: 48-TQFP, 48-VQFP
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.98 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 50MHz
• Number Of I /o: 36
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.2.5
10.2.6
10.2.7
32099AS–AVR32–06/09
GPIO
PM
SCIF
1. GPIO interrupt flag can not be cleared when interrupts are disabled
2. VERSION register reads 0x210
1. OCP and high frequency clock sources
2. CONFIG register reads 0x4F
3. PB writes via debugger in sleep modes are blocked during sleepwalking
4. VERSION register reads 0x400
5. WCAUSE register should not be used
6. Clock failure detector does not work
1. A reset from Supply Monitor 33 will be registered as POR
Fix/Workaround
None.
The GPIO interrupt flag can not be cleared unless the interrupt is enabled for the pin.
Fix/workaround
Enable interrupt for the corresponding pin, then clear the interrupt flag.
The VERSION register reads 0x210 instead of 0x211.
Fix/Workaround
None.
OCP does not work if the main clock source is a high frequency clock. If the frequency of the
source exceeds the maximum frequency of the CRIPOSC the OCP will generate an inter-
rupt and switch clock source to the slow clock upon enabling the OCP, even if the CPU clock
is divided to a legal frequency.
Fix/Workaround
Do not use clock sources with frequencies higher that the maximum CPU frequency while
using the OCP.
The CONFIG register reads 0x4F instead of 0x43.
Fix/Workaround
None.
During sleepwalking, PB writes performed by a debugger will be discarded by all PB mod-
ules except the module that is requesting the clock.
Fix/workaround
None.
The VERSION register reads 0x400 instead of 0x411.
Fix/Workaround
None.
The WCAUSE register should not be used.
Fix/Workaround
None.
In some cases the clock failure detector will not detect if the CPU clock stops. In this case
the CPU will halt operation.
Fix/Workaround
None.
AT32UC3L
59