ATMEGA645P-MUR Atmel, ATMEGA645P-MUR Datasheet - Page 246

• Manufacturer Part Number: ATMEGA645P-MUR
• Description: MCU AVR 64KB FLASH 16MHZ 64QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA645P-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.5.4
246
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
Scanning the Analog Comparator
Table 24-1 on page 246
tors with XTAL1/XTAL2 connections as well as 32kHz Timer Oscillator.
Table 24-1.
Notes:
The relevant Comparator signals regarding Boundary-scan are shown in
246. The Boundary-scan cell from
The signals are described in
The Comparator need not be used for pure connectivity testing, since all analog inputs are
shared with a digital port pin as well.
Figure 24-7. Analog Comparator
Enable Signal
EXTCLKEN
OSCON
OSC32EN
1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift between
3. The clock configuration is programmed by fuses. As a fuse is not changed run-time, the clock
the internal Oscillator and the JTAG TCK clock. If possible, scanning an external clock is
preferred.
configuration is considered fixed for a given application. The user is advised to scan the same
clock option as to be used in the final system. The enable signals are supported in the scan
chain because the system logic can disable clock options in sleep modes, thereby disconnect-
ing the Oscillator pins from the scan path if not provided.
Scan Signals for the Oscillator
ADCEN
ACME
Scanned
Clock Line
EXTCLK (XTAL1)
OSCCK
OSC32CK
ADC MULTIPLEXER
summaries the scan registers for the external clock pin XTAL1, oscilla-
REFERENCE
BANDGAP
OUTPUT
Table 24-2 on page
Figure 24-8 on page 247
ACBG
Clock Option
External Clock
External Crystal
External Ceramic Resonator
Low Freq. External Crystal
(1)(2)(3)
247.
ACD
AC_IDLE
is attached to each of these signals.
Scanned Clock Line
Figure 24-7 on page
ACO
when not Used
8285B–AVR–03/11
0
1
1