AT90USB646-MUR Atmel, AT90USB646-MUR Datasheet - Page 298

MCU AVR 64K FLASH 16MHZ 64QFN

AT90USB646-MUR

Manufacturer Part Number
AT90USB646-MUR
Description
MCU AVR 64K FLASH 16MHZ 64QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet

Specifications of AT90USB646-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
23.16.1
298
AT90USB64/128
General USB Host registers
• 7-3 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 2 - RESUME - Send USB Resume
Set this bit to generate a USB Resume on the USB bus.
Cleared by hardware when the USB Resume has been sent. Clearing by software has no effect.
This bit should be set only when the start of frame generation is enable (SOFEN bit set).
• 1 - RESET - Send USB Reset
Set this bit to generate a USB Reset on the USB bus.
Cleared by hardware when the USB Reset has been sent. Clearing by software has no effect.
Refer to the USB reset section for more details.
• 0 - SOFEN - Start Of Frame Generation Enable
Set this bit to generate SOF on the USB bus in full speed mode and keep-alive in low speed
mode.
Clear this bit to disable the SOF generation and to leave the USB bus in Idle state.
• 7 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 6 - HWUPI
Host Wake-Up Interrupt
Set by hardware when a non-idle state is detected on the USB bus.This interrupt should be
enable only to wake up the CPU core from power down mode.
Shall be clear by software to acknowledge the interrupt. Setting by software has no effect.
• 5 - HSOFI - Host Start Of Frame Interrupt
Set by hardware when a SOF is issued by the Host controller. This triggers a USB interrupt
when HSOFE is set. When using the host controller in low speed mode, this bit is also set when
a keep-alive is sent.
Shall be cleared by software to acknowledge the interrupt. Setting by software has no effect.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
R
7
0
-
R
7
0
-
HWUPI
R
R/W
6
0
-
6
0
HSOFI
R
5
0
R/W
-
5
0
RXRSMI
R
4
0
R/W
-
4
0
RSMEDI
R
3
0
R/W
-
3
0
RESUME
R/W
RSTI
2
0
R/W
2
0
RESET
DDISCI
R/W
1
0
R/W
1
0
SOFEN
DCONNI
R/W
R/W
0
0
7593K–AVR–11/09
0
0
UHCON
UHINT

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