ATMEGA649P-MUR Atmel, ATMEGA649P-MUR Datasheet - Page 102
ATMEGA649P-MUR
Manufacturer Part Number
ATMEGA649P-MUR
Description
AVR, 64KB FLASH, 2KB EE, 4KB SRA
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA649P-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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14.6.1
14.7
8284A–AVR–10/10
Modes of Operation
Compare Output Mode and Waveform Generation
Figure 14-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0A) from the Waveform
Generator if either of the COM0A1:0 bits are set. However, the OC0A pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC0A pin (DDR_OC0A) must be set as output before the OC0A value is vis-
ible on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC0A state before the
output is enabled. Note that some COM0A1:0 bit settings are reserved for certain modes of
operation. See
The Waveform Generator uses the COM0A1:0 bits differently in Normal, CTC, and PWM
modes. For all modes, setting the COM0A1:0 = 0 tells the Waveform Generator that no action on
the OC0A Register is to be performed on the next compare match. For compare output actions
in the non-PWM modes refer to
4 on page
A change of the COM0A1:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOC0A strobe bits.
The mode of operation, i.e., the behavior of the Timer/Counter and the Output Compare pins, is
defined by the combination of the Waveform Generation mode (WGM01:0) and Compare Output
mode (COM0A1:0) bits. The Compare Output mode bits do not affect the counting sequence,
while the Waveform Generation mode bits do. The COM0A1:0 bits control whether the PWM
output generated should be inverted or not (inverted or non-inverted PWM). For non-PWM
modes the COM0A1:0 bits control whether the output should be set, cleared, or toggled at a
compare match
For detailed timing information refer to
in
”Timer/Counter Timing Diagrams” on page
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
162, and for phase correct PWM refer to
COMnx1
COMnx0
FOCn
clk
See ”Register Description” on page
(See ”Compare Match Output Unit” on page
I/O
Waveform
Generator
Table 17-3 on page
Figure
D
D
D
PORT
DDR
OCnx
107.
14-8,
Q
Q
Q
161..
Table 17-5 on page
Figure
162. For fast PWM mode, refer to
14-9,
101.).
1
0
Figure 14-10
162.
OCn
Pin
and
Figure 14-11
Table 17-
102
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