ATMEGA649P-MUR Atmel, ATMEGA649P-MUR Datasheet - Page 242

• Manufacturer Part Number: ATMEGA649P-MUR
• Description: AVR, 64KB FLASH, 2KB EE, 4KB SRA
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649P-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.3.5
23.3.6
8284A–AVR–10/10
Low Power Waveform
Operation in Sleep Mode
Figure 23-6. Driving a LCD with Four Common Terminals
To reduce toggle activity and hence power consumption a low power waveform can be selected
by writing LCDAB to one. Low power waveform requires two subsequent frames with the same
display data to obtain zero DC voltage. Consequently data latching and Interrupt Flag is only set
every second frame. Default and low power waveform is shown in
1/3 bias. For other selections of duty and bias, the effect is similar.
Figure 23-7. Default and Low Power Waveform
When synchronous LCD clock is selected (LCDCS = 0) the LCD display will operate in Idle
mode and Power-save mode with any clock source.
An asynchronous clock from TOSC1 can be selected as LCD clock by writing the LCDCS bit to
one when Calibrated Internal RC Oscillator is selected as system clock source. The LCD will
then operate in Idle mode, ADC Noise Reduction mode and Power-save mode.
When EXCLK in ASSR Register is written to one, and asynchronous clock is selected, the exter-
nal clock input buffer is enabled and an external clock can be input on Timer Oscillator 1
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
-
-
-
-
2
1
2
1
2
1
1
2
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
-V
3
3
3
3
3
3
3
3
-V
V
V
V
V
V
V
V
V
V
V
V
GND
GND
GND
V
V
V
GND
V
V
V
GND
V
V
V
GND
V
V
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
Frame
Frame
Frame
Frame
SEG0
COM0
SEG0 - COM0
SEG0
COM0
SEG0 - COM0
-
-
-
-
2
1
2
1
2
1
1
2
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
/
/
/
/
/
/
/
/
-V
3
3
3
3
3
3
3
3
V
V
V
V
V
V
V
V
V
V
V
-V
GND
GND
GND
V
V
V
GND
V
V
V
GND
V
V
V
GND
V
V
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
Frame
Frame
Figure 23-7
Frame
Frame
SEG0
COM0
SEG0 - COM0
for 1/3 duty and
SEG0
COM1
SEG0 - COM1
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