ATMEGA649P-MUR Atmel, ATMEGA649P-MUR Datasheet - Page 25

AVR, 64KB FLASH, 2KB EE, 4KB SRA

ATMEGA649P-MUR

Manufacturer Part Number
ATMEGA649P-MUR
Description
AVR, 64KB FLASH, 2KB EE, 4KB SRA
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA649P-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.3.2
7.3.3
8284A–AVR–10/10
EEPROM Write During Power-down Sleep Mode
Preventing EEPROM Corruption
When entering Power-down sleep mode while an EEPROM write operation is active, the
EEPROM write operation will continue, and will complete before the Write Access time has
passed. However, when the write operation is completed, the clock continues running, and as a
consequence, the device does not enter Power-down entirely. It is therefore recommended to
verify that the EEPROM write operation is completed before entering Power-down.
During periods of low V
too low for the CPU and the EEPROM to operate properly. These issues are the same as for
board level systems using EEPROM, and the same design solutions should be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too low. First,
a regular write sequence to the EEPROM requires a minimum voltage to operate correctly. Sec-
ondly, the CPU itself can execute instructions incorrectly, if the supply voltage is too low.
EEPROM data corruption can easily be avoided by following this design recommendation:
Assembly Code Example
C Code Example
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
EEPROM_read:
unsigned char EEPROM_read(unsigned int uiAddress)
{
}
; Wait for completion of previous write
sbic EECR,EEWE
rjmp EEPROM_read
; Set up address (r18:r17) in address register
out EEARH, r18
out EEARL, r17
; Start eeprom read by writing EERE
sbi EECR,EERE
; Read data from Data Register
in
ret
/* Wait for completion of previous write */
while(EECR & (1<<EEWE))
/* Set up address register */
EEAR = uiAddress;
/* Start eeprom read by writing EERE */
EECR |= (1<<EERE);
/* Return data from Data Register */
return EEDR;
;
r16,EEDR
CC,
the EEPROM data can be corrupted because the supply voltage is
25

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