PIC18F452-I/PG Microchip Technology, PIC18F452-I/PG Datasheet - Page 175
![IC MCU FLASH 16KX16 W/AD 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F452-I/PG
Manufacturer Part Number
PIC18F452-I/PG
Description
IC MCU FLASH 16KX16 W/AD 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18F452-I/PG
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
ACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- Current page: 175 of 332
- Download datasheet (6Mb)
FIGURE 16-2:
FIGURE 16-3:
TABLE 16-6:
© 2006 Microchip Technology Inc.
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE
PIR1
PIE1
IPR1
RCSTA
TXREG USART Transmit Register
TXSTA
SPBRG Baud Rate Generator Register
Legend: x = unknown, - = unimplemented locations read as '0'.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18F2X2 devices; always maintain these bits clear.
TXIF bit
(Interrupt Reg. Flag)
Name
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Note:
Reg. Empty Flag)
(Transmit Shift
Reg. Empty Flag)
RC6/TX/CK (pin)
RC6/TX/CK (pin)
Write to TXREG
Write to TXREG
(Transmit Buffer
BRG Output
(Shift Clock)
BRG Output
(Shift Clock)
Shaded cells are not used for Asynchronous Transmission.
TRMT bit
This timing diagram shows two consecutive transmissions.
PSPIE
PSPIP
PSPIF
TXIF bit
CSRC
SPEN
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
(1)
(1)
(1)
ASYNCHRONOUS TRANSMISSION
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
ADIE
ADIP
ADIF
Bit 6
RX9
TX9
Transmit Shift Reg.
Word 1
Transmit Shift Reg
Word 1
Word 1
Word 1
SREN
TXEN
RCIF
RCIE
RCIP
START bit
Bit 5
START bit
Word 2
CREN ADDEN
SYNC
Bit 4
TXIF
TXIE
TXIP
bit 0
bit 0
SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
SSPIP CCP1IP TMR2IP TMR1IP 0000 0000 0000 0000
RBIE
Bit 3
—
bit 1
Word 1
bit 1
TMR0IF INT0IF
BRGH
FERR
Word 1
Bit 2
OERR
TRMT
Bit 1
bit 7/8
Word 2
Transmit Shift Reg.
RX9D
TX9D
RBIF
bit 7/8
Bit 0
STOP bit
PIC18FXX2
STOP bit
0000 000x 0000 000u
0000 -00x 0000 -00x
0000 0000 0000 0000
0000 -010 0000 -010
0000 0000 0000 0000
POR, BOR
Value on
START bit
DS39564C-page 173
Word 2
All Other
Value on
RESETS
bit 0
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