PIC18F86J65-I/PT Microchip Technology, PIC18F86J65-I/PT Datasheet - Page 42

• Manufacturer Part Number: PIC18F86J65-I/PT
• Description: IC PIC MCU FLASH 48KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J65-I/PT

• Core Size: 8-Bit
• Program Memory Size: 96KB (48K x 16)
• Core Processor: PIC
• Speed: 41.667MHz
• Connectivity: Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 55
• Program Memory Type: FLASH
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 55
• Ram Memory Size: 3.71875KB
• Cpu Speed: 41.667MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 55
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F97J60 FAMILY
TABLE 1-6:
DS39762E-page 42
NC
V
V
AV
AV
ENVREG
V
V
V
V
V
V
V
RBIAS
TPOUT+
TPOUT-
TPIN+
TPIN-
Legend:
Note 1:
SS
DD
DDCORE
SSPLL
DDPLL
SSTX
DDTX
SSRX
DDRX
SS
DD
V
V
DDCORE
CAP
2:
3:
4:
5:
Pin Name
/V
CAP
TTL = TTL compatible input
ST
I
P
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Extended Microcontroller mode).
Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX Configuration bit is set).
Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Microcontroller mode).
Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
= Schmitt Trigger input with CMOS levels
= Input
= Power
PIC18F96J60/96J65/97J60 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
15, 36, 40,
17, 37, 59,
60, 65, 85
62, 86
TQFP
31
30
29
16
82
81
79
76
72
75
80
78
77
74
73
9
Type
Pin
—
O
O
P
P
P
P
P
P
P
P
P
P
P
P
I
I
I
I
Analog Bias current for Ethernet PHY. Must be tied to V
Analog Ethernet differential signal input.
Analog Ethernet differential signal input.
Buffer
Type
ST
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
No connect.
Ground reference for logic and I/O pins.
Positive supply for peripheral digital logic and I/O pins.
Ground reference for analog modules.
Positive supply for analog modules.
Enable for on-chip voltage regulator.
Core logic power or external filter capacitor connection.
Ground reference for Ethernet PHY PLL.
Positive 3.3V supply for Ethernet PHY PLL.
Ground reference for Ethernet PHY transmit subsystem.
Positive 3.3V supply for Ethernet PHY transmit subsystem.
Ground reference for Ethernet PHY receive subsystem.
Positive 3.3V supply for Ethernet PHY receive subsystem.
see Section 18.0 “Ethernet Module” for specification.
Ethernet differential signal output.
Ethernet differential signal output.
Positive supply for microcontroller core logic
(regulator disabled).
External filter capacitor connection (regulator enabled).
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to V
Description
© 2009 Microchip Technology Inc.
SS
via a resistor;
DD
)