PIC18F4455-I/P Microchip Technology, PIC18F4455-I/P Datasheet - Page 422

IC PIC MCU FLASH 12KX16 40DIP

PIC18F4455-I/P

Manufacturer Part Number
PIC18F4455-I/P
Description
IC PIC MCU FLASH 12KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4455-I/P

Program Memory Type
FLASH
Program Memory Size
24KB (12K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI/I2C/EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRDDVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4455-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F4455-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F4455-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
PIC18F2455/2550/4455/4550
RESET ............................................................................. 337
Reset State of Registers .................................................... 50
Resets ........................................................................ 43, 285
RETFIE ............................................................................ 338
RETLW ............................................................................. 338
RETURN .......................................................................... 339
Return Address Stack ........................................................ 58
Return Stack Pointer (STKPTR) ........................................ 59
Revision History ............................................................... 409
RLCF ................................................................................ 339
RLNCF ............................................................................. 340
RRCF ............................................................................... 340
RRNCF ............................................................................. 341
S
SCK .................................................................................. 193
SDI ................................................................................... 193
SDO ................................................................................. 193
SEC_IDLE Mode ................................................................ 40
SEC_RUN Mode ................................................................ 36
Serial Clock, SCK ............................................................. 193
Serial Data In (SDI) .......................................................... 193
Serial Data Out (SDO) ..................................................... 193
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 341
Slave Select (SS) ............................................................. 193
SLEEP .............................................................................. 342
Sleep
Sleep Mode ........................................................................ 39
Software Simulator (MPLAB SIM) .................................... 358
Special Event Trigger. See Compare (CCP Module).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ............................................ 285
Special ICPORT Features ................................................ 305
SPI Mode (MSSP)
DS39632C-page 420
STATUS ..................................................................... 71
STKPTR (Stack Pointer) ............................................ 59
T0CON (Timer0 Control) .......................................... 125
T1CON (Timer1 Control) .......................................... 129
T2CON (Timer2 Control) .......................................... 135
T3CON (Timer3 Control) .......................................... 137
TXSTA (Transmit Status and Control) ..................... 238
UCFG (USB Configuration) ...................................... 166
UCON (USB Control) ............................................... 164
UEIE (USB Error Interrupt Enable) .......................... 182
UEIR (USB Error Interrupt Status) ........................... 181
UEPn (USB Endpoint n Control) .............................. 169
UIE (USB Interrupt Enable) ...................................... 180
UIR (USB Interrupt Status) ...................................... 178
USTAT (USB Status) ............................................... 168
WDTCON (Watchdog Timer Control) ....................... 298
Brown-out Reset (BOR) ........................................... 285
Oscillator Start-up Timer (OST) ............................... 285
Power-on Reset (POR) ............................................ 285
Power-up Timer (PWRT) ......................................... 285
and Associated Registers .......................................... 58
OSC1 and OSC2 Pin States ...................................... 33
Associated Registers ............................................... 201
Bus Mode Compatibility ........................................... 201
Effects of a Reset ..................................................... 201
Enabling SPI I/O ...................................................... 197
Master Mode ............................................................ 198
Master/Slave Connection ......................................... 197
Operation ................................................................. 196
Operation in Power-Managed Modes ...................... 201
Serial Clock .............................................................. 193
Preliminary
SPP. See Streaming Parallel Port.
SS .................................................................................... 193
SSPOV ............................................................................ 227
SSPOV Status Flag ......................................................... 227
SSPSTAT Register
SSPxSTAT Register
Stack Full/Underflow Resets .............................................. 60
STATUS Register .............................................................. 71
Streaming Parallel Port .................................................... 187
SUBFSR .......................................................................... 353
SUBFWB ......................................................................... 342
SUBLW ............................................................................ 343
SUBULNK ........................................................................ 353
SUBWF ............................................................................ 343
SUBWFB ......................................................................... 344
SWAPF ............................................................................ 344
T
T0CON Register
Table Pointer Operations (table) ........................................ 82
Table Reads/Table Writes ................................................. 60
TBLRD ............................................................................. 345
TBLWT ............................................................................. 346
Time-out in Various Situations (table) ................................ 47
Timer0 .............................................................................. 125
Timer1 .............................................................................. 129
Serial Data In ........................................................... 193
Serial Data Out ........................................................ 193
Slave Mode .............................................................. 199
Slave Select ............................................................. 193
Slave Select Synchronization .................................. 199
SPI Clock ................................................................. 198
Typical Connection .................................................. 197
R/W Bit .................................................................... 209
R/W Bit .................................................................... 207
Associated Registers ............................................... 192
Clocking Data .......................................................... 188
Configuration ........................................................... 187
Internal Pull-ups ....................................................... 188
Interrupts ................................................................. 190
Microcontroller Control Setup .................................. 190
Reading from (Microcontroller Mode) ...................... 191
Transfer of Data Between USB SIE
USB Control Setup .................................................. 190
Wait States .............................................................. 188
Writing to (Microcontroller Mode) ............................. 190
PSA Bit .................................................................... 127
T0CS Bit .................................................................. 126
T0PS2:T0PS0 Bits ................................................... 127
T0SE Bit .................................................................. 126
16-Bit Mode Timer Reads and Writes ...................... 126
Associated Registers ............................................... 127
Clock Source Edge Select (T0SE Bit) ..................... 126
Clock Source Select (T0CS Bit) ............................... 126
Operation ................................................................. 126
Overflow Interrupt .................................................... 127
Prescaler ................................................................. 127
Prescaler. See Prescaler, Timer0.
16-Bit Read/Write Mode .......................................... 131
Associated Registers ............................................... 133
Interrupt ................................................................... 132
Operation ................................................................. 130
and SPP (diagram) .......................................... 190
Switching Assignment ..................................... 127
© 2006 Microchip Technology Inc.

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