PIC18F442-E/PT Microchip Technology, PIC18F442-E/PT Datasheet - Page 281
![IC MCU CMOS 40MHZ 8K FLSH 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18F442-E/PT
Manufacturer Part Number
PIC18F442-E/PT
Description
IC MCU CMOS 40MHZ 8K FLSH 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18F442-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F442-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- Current page: 281 of 332
- Download datasheet (6Mb)
FIGURE 22-13:
TABLE 22-12: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 1)
© 2006 Microchip Technology Inc.
71
71A
72
72A
73
73A
74
75
76
78
79
80
81
Note 1: Requires the use of Parameter # 73A.
Param.
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SCK
SDO
SS
SCK
2: Only if Parameter # 71A and # 72A are used.
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
B
Symbol
Refer to Figure 22-4 for load conditions.
2
B
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte1 to the 1st clock edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SCK output rise time (Master mode) PIC18FXXX
SCK output fall time (Master mode) PIC18FXXX
SDO data output valid after SCK
edge
SDO data output setup to SCK edge
EXAMPLE SPI MASTER MODE TIMING (CKE = 1)
81
73
MSb In
MSb
74
71
75, 76
80
Characteristic
72
bit6 - - - - - -1
bit6 - - - -1
Continuous
Single Byte
Continuous
Single Byte
PIC18FXXX
PIC18LFXXX
PIC18FXXX
PIC18LFXXX
PIC18LFXXX
PIC18LFXXX
PIC18FXXX
PIC18LFXXX
LSb In
LSb
1.25 T
1.25 T
1.5 T
79
78
Min
100
100
T
40
40
CY
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
+ 40
+ 30
+ 30
PIC18FXX2
Max Units Conditions
150
25
60
25
60
25
60
25
60
50
—
—
—
—
—
—
—
—
DS39564C-page 279
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
V
V
DD
DD
DD
DD
DD
= 2V
= 2V
= 2V
= 2V
= 2V
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