PIC18LF8520-I/PT Microchip Technology, PIC18LF8520-I/PT Datasheet - Page 138
PIC18LF8520-I/PT
Manufacturer Part Number
PIC18LF8520-I/PT
Description
IC MCU FLASH 16KX16 EEPROM80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F8520T-IPT.pdf
(380 pages)
3.PIC18F8520T-IPT.pdf
(16 pages)
4.PIC18F8520T-IPT.pdf
(40 pages)
5.PIC18F8520-IPT.pdf
(2 pages)
Specifications of PIC18LF8520-I/PT
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
68
Eeprom Memory Size
1024Byte
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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Manufacturer:
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Quantity:
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Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F8520T-IPT PDF datasheet #2
- PIC18F8520T-IPT PDF datasheet #3
- PIC18F8520T-IPT PDF datasheet #4
- PIC18F8520-IPT PDF datasheet #5
- Current page: 138 of 380
- Download datasheet (7Mb)
PIC18F6520/8520/6620/8620/6720/8720
12.1
Timer1 can operate in one of these modes:
• As a timer
• As a synchronous counter
• As an asynchronous counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
FIGURE 12-1:
FIGURE 12-2:
DS39609B-page 136
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This eliminates power drain.
T1OSO/T13CKI
T1OSO/T13CKI
Timer1 Operation
TMR1IF
Overflow
Interrupt
Flag Bit
TMR1IF
Overflow
Interrupt
Flag bit
Data Bus<7:0>
Write TMR1L
Read TMR1L
T1OSI
T1OSI
TIMER1 BLOCK DIAGRAM
TIMER1 BLOCK DIAGRAM: 16-BIT READ/WRITE MODE
8
TMR1H
T1OSC
T1OSC
High Byte
TMR1H
Timer 1
8
8
TMR1
T1OSCEN
Enable
Oscillator
TMR1
TMR1L
Oscillator
Enable
T1OSCEN
CLR
TMR1L
(1)
8
(1)
Clock
Internal
F
CLR
OSC
/4
TMR1ON
CCP Special Event Trigger
On/Off
Clock
F
Internal
TMR1CS
OSC
1
0
When TMR1CS = 0, Timer1 increments every instruc-
tion cycle. When TMR1CS = 1, Timer1 increments on
every rising edge of the external clock input or the
Timer1 oscillator, if enabled.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the RC1/T1OSI and RC0/T1OSO/T13CKI pins
become inputs. That is, the TRISC<1:0> value is
ignored and the pins are read as ‘0’.
Timer1 also has an internal “Reset input”. This
Reset can be generated by the CCP module
(see Section 16.0 “Capture/Compare/PWM (CCP)
Modules”).
/4
TMR1ON
CCP Special Event Trigger
On/Off
T1CKPS1:T1CKPS0
TMR1CS
1
0
T1SYNC
Prescaler
1, 2, 4, 8
0
1
T1CKPS1:T1CKPS0
2
T1SYNC
Prescaler
1, 2, 4, 8
1
0
2
2004 Microchip Technology Inc.
Synchronized
Clock Input
Synchronize
Sleep Input
Synchronized
det
Clock Input
Synchronize
Sleep Input
det
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