PIC18LF8520-I/PT Microchip Technology, PIC18LF8520-I/PT Datasheet - Page 27

• Manufacturer Part Number: PIC18LF8520-I/PT
• Description: IC MCU FLASH 16KX16 EEPROM80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8520-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 68
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.6.1
The system clock source switching is performed under
software control. The system clock switch bit, SCS
(OSCCON<0>), controls the clock switching. When the
SCS bit is ‘0’, the system clock source comes from the
main oscillator that is selected by the FOSC configura-
tion bits in Configuration Register 1H. When the SCS
bit is set, the system clock source will come from the
Timer1 oscillator. The SCS bit is cleared on all forms of
Reset.
REGISTER 2-1:
 2004 Microchip Technology Inc.
SYSTEM CLOCK SWITCH BIT
bit 7-1 Unimplemented: Read as ‘0’
bit 0
PIC18F6520/8520/6620/8620/6720/8720
OSCCON REGISTER
bit 7
SCS: System Clock Switch bit
When OSCSEN Configuration bit = 0 and T1OSCEN bit is set:
1 = Switch to Timer1 oscillator/clock pin
0 = Use primary oscillator/clock input pin
When OSCSEN and T1OSCEN are in other states:
Bit is forced clear.
Legend:
R = Readable bit
- n = Value at POR
U-0
—
U-0
—
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
—
Note:
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
The Timer1 oscillator must be enabled
and operating to switch the system clock
source. The Timer1 oscillator is enabled
by setting the T1OSCEN bit in the Timer1
Control register (T1CON). If the Timer1
oscillator is not enabled, then any write to
the SCS bit will be ignored (SCS bit forced
cleared) and the main oscillator will
continue to be the system clock source.
U-0
—
U-0
—
x = Bit is unknown
U-0
—
DS39609B-page 25
R/W-1
SCS
bit 0