PIC18LF8520-I/PT Microchip Technology, PIC18LF8520-I/PT Datasheet - Page 28

• Manufacturer Part Number: PIC18LF8520-I/PT
• Description: IC MCU FLASH 16KX16 EEPROM80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8520-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 68
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 2KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6520/8520/6620/8620/6720/8720
2.6.2
PIC18FXX20 devices contain circuitry to prevent
“glitches” when switching between oscillator sources.
Essentially, the circuitry waits for eight rising edges of
the clock source that the processor is switching to. This
ensures that the new clock source is stable and that its
pulse width will not be less than the shortest pulse
width of the two clock sources.
FIGURE 2-8:
The sequence of events that takes place when switch-
ing from the Timer1 oscillator to the main oscillator will
depend on the mode of the main oscillator. In addition
to eight clock cycles of the main oscillator, additional
delays may take place.
FIGURE 2-9:
DS39609B-page 26
(OSCCON<0>)
Note 1: Delay on internal system clock is eight oscillator cycles for synchronization.
System Clock
T1OSI
OSC1
Internal
System
Clock
SCS
(OSCCON<0>)
Program
Counter
Note 1: T
Program
Counter
Internal
T1OSI
OSC1
OSC2
SCS
OST
OSCILLATOR TRANSITIONS
Q1
= 1024 T
T
Q2
OSC
Q3
PC
Q3
OSC
PC
Q4
TIMING DIAGRAM FOR TRANSITION FROM OSC1 TO TIMER1 OSCILLATOR
TIMING FOR TRANSITION BETWEEN TIMER1 AND OSC1 (HS, XT, LP)
(drawing not to scale).
Q4
Q1
T
DLY
1
Q1
2
T
T
1
P
3
T
OST
4
T
SCS
PC + 2
T
5
OSC
6
PC + 2
A timing diagram indicating the transition from the main
oscillator to the Timer1 oscillator is shown in Figure 2-8.
The Timer1 oscillator is assumed to be running all the
time. After the SCS bit is set, the processor is frozen at
the next occurring Q1 cycle. After eight synchronization
cycles are counted from the Timer1 oscillator, operation
resumes. No additional delays are required after the
synchronization cycles.
If the main oscillator is configured for an external
crystal (HS, XT, LP), then the transition will take place
after an oscillator start-up time (T
timing diagram, indicating the transition from the
Timer1 oscillator to the main oscillator for HS, XT and
LP modes, is shown in Figure 2-9.
7
1
2
8
Q1
3
Q2
4
T
T
SCS
T
1
P
5
Q3
6
Q4
 2004 Microchip Technology Inc.
7
Q1
8
Q1
Q2 Q3
Q2
OST
PC + 4
) has occurred. A
Q4
Q3
Q1 Q2
Q4
PC + 6
Q1
Q3