DSPIC30F6010A-20E/PF Microchip Technology, DSPIC30F6010A-20E/PF Datasheet - Page 5
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DSPIC30F6010A-20E/PF
Manufacturer Part Number
DSPIC30F6010A-20E/PF
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20IP.pdf
(26 pages)
2.DSPIC30F6011A-30IPT.pdf
(6 pages)
3.DSPIC30F6015-30IPT.pdf
(232 pages)
4.DSPIC30F6015-30IPT.pdf
(14 pages)
5.DSPIC30F6015-30IPT.pdf
(12 pages)
6.DSPIC30F6015-30IPT.pdf
(18 pages)
7.DSPIC30F6010A-30IPF.pdf
(22 pages)
Specifications of DSPIC30F6010A-20E/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TQFP, 80-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
68
Flash Memory Size
144KB
Supply Voltage Range
4.5V To 5.5V
Package
80TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
68
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
16-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6010A-20E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Register 35-2:
© 2008 Microchip Technology Inc.
Upper Byte:
bit 15
bit 15-13 Unimplemented: Read as ‘0’
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4-2
Note 1: The SMP bit must be set only after setting the MSTEN bit. The SMP bit remains cleared if MSTEN = 0.
U-0
—
2: The CKE bit is not used in the Framed SPI modes. The user application should program this bit to ‘0’ for
DISSCK: Disable SCK1 Pin bit (SPI Master modes only)
1 = Internal SPI clock is disabled; pin functions as I/O
0 = Internal SPI clock is enabled
DISSDO: Disable SDO1 Pin bit
1 = SDO1 pin is not used by the module; pin functions as I/O
0 = SDO1 pin is controlled by the module
MODE16: Word/Byte Communication Select bit
1 = Communication is word-wide (16 bits)
0 = Communication is byte-wide (8 bits)
SMP: SPI1 Data Input Sample Phase bit
Master mode:
1 = Input data is sampled at the end of data output time
0 = Input data is sampled at the middle of data output time
Slave mode:
SMP must be cleared when SPI1 is used in Slave mode
CKE: SPI1 Clock Edge Select bit
1 = Serial output data changes on transition from active clock state to Idle clock state (see bit 6)
0 = Serial output data changes on transition from Idle clock state to active clock state (see bit 6)
SSEN: Slave Select Enable bit (Slave mode)
1 = SS1 pin is used for Slave mode
0 = SS1 pin is not used by module; pin is controlled by port function
CKP: Clock Polarity Select bit
1 = Idle state for clock is a high level; active state is a low level
0 = Idle state for clock is a low level; active state is a high level
MSTEN: Master Mode Enable bit
1 = Master mode
0 = Slave mode
SPRE<2:0>: Secondary Prescale bits (Master mode)
111 = Secondary prescale 1:1
110 = Secondary prescale 2:1
•
•
•
000 = Secondary prescale 8:1
the Framed SPI modes (FRMEN = 1).
U-0
—
SPI1CON1: SPI1 Control Register 1
Lower Byte:
bit 7
Section 35. Serial Peripheral Interface (SPI) (Part II)
R/W-0
SSEN
U-0
—
R/W-0
CKP
DISSCK
R/W-0
(2)
MSTEN
R/W-0
(1)
DISSDO
R/W-0
R/W-0
MODE16
R/W-0
SPRE<2:0>
R/W-0
SMP
R/W-0
(1)
R/W-0
CKE
R/W-0
(2)
bit 8
R/W-0
DS70272B-page 35-5
PPRE<1:0>
R/W-0
bit 0
35