AT90USB1287-MU Atmel, AT90USB1287-MU Datasheet - Page 256

IC AVR MCU 128K 64QFN

AT90USB1287-MU

Manufacturer Part Number
AT90USB1287-MU
Description
IC AVR MCU 128K 64QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet

Specifications of AT90USB1287-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
64QFN EP
Device Core
AVR
Family Name
AT90
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT90USB1287-16MU
AT90USB1287-16MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90USB1287-MU
Manufacturer:
KEMET
Quantity:
30 000
Part Number:
AT90USB1287-MU
Manufacturer:
ATMEL
Quantity:
3 335
21.5.3
21.6
21.6.1
256
Speed Control
AT90USB64/128
Freeze clock
Device mode
The firmware has the ability to reduce the power consumption by setting the FRZCLK bit, which
freeze the clock of USB controller. When FRZCLK is set, it is still possible to access to the fol-
lowing registers:
Moreover, when FRZCLK is set, only the following interrupts may be triggered:
When the USB interface is configured in device mode, the speed selection (Full Speed or Low
Speed) depends on the UDP/UDM pull-up. The LSM bit in UDCON register allows to select an
internal pull up on UDM (Low Speed mode) or UDP(Full Speed mode) data lines.
Figure 21-14. Device mode Speed Selection
• the HWUPI interrupt is triggered in the Host mode (HOST set).
• the IDTI interrupt is triggered
• the VBUSTI interrupt is triggered
• USBCON, USBSTA, USBINT
• UDCON (detach, ...)
• UDINT
• UDIEN
• UHCON
• UHINT
• UHIEN
• WAKEUPI
• IDTI
• VBUSTI
• HWUPI
UCAP
UDM
UDP
DETACH
UDCON.0
UDCON.2
LSM
Regulator
USB
7593K–AVR–11/09

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