AT90USB1287-MU Atmel, AT90USB1287-MU Datasheet - Page 286

• Manufacturer Part Number: AT90USB1287-MU
• Description: IC AVR MCU 128K 64QFN
• Manufacturer: Atmel
• Series: AVR® 90USBr

Specifications of AT90USB1287-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 48
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 64QFN EP
• Device Core: AVR
• Family Name: AT90
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AT90USB1287-16MU; AT90USB1287-16MU

286
AT90USB64/128
01b 1 busy bank
10b 2 busy banks
11b Reserved.
• 7-3 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 2 - CTRLDIR - Control Direction (Flag, and bit for debug purpose)
Set by hardware after a SETUP packet, and gives the direction of the following packet:
- 1 for IN endpoint
- 0 for OUT endpoint.
Can not be set or cleared by software.
• 1-0 - CURRBK1:0 - Current Bank (all endpoints except Control endpoint) Flag
Set by hardware to indicate the number of the current bank:
00b Bank0
01b Bank1
1xb
Can not be set or cleared by software.
• 7 - FIFOCON - FIFO Control Bit
For OUT and SETUP Endpoint:
Set by hardware when a new OUT message is stored in the current bank, at the same time than
RXOUT or RXSTP.
Clear to free the current bank and to switch to the following bank. Setting by software has no
effect.
For IN Endpoint:
Set by hardware when the current bank is free, at the same time than TXIN.
Clear to send the FIFO data and to switch the bank. Setting by software has no effect.
• 6 - NAKINI - NAK IN Received Interrupt Flag
Reserved.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
FIFOCON
R/W
7
0
R
7
0
-
NAKINI
R/W
R
6
0
6
0
-
RWAL
R/W
5
0
R
5
0
-
NAKOUTI
R/W
4
0
R
4
0
-
RXSTPI
R/W
3
0
R
3
0
-
CTRLDIR
RXOUTI
R/W
2
0
R
2
0
STALLEDI
R/W
R
1
1
0
0
CURRBK1:0
TXINI
R/W
R
7593K–AVR–11/09
0
0
0
0
UESTA1X
UEINTX