DSPIC30F6011A-30I/PF Microchip Technology, DSPIC30F6011A-30I/PF Datasheet - Page 228
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DSPIC30F6011A-30I/PF
Manufacturer Part Number
DSPIC30F6011A-30I/PF
Description
IC DSPIC MCU/DSP 132K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F6011A-30IPT.pdf
(234 pages)
4.DSPIC30F6011A-30IPT.pdf
(8 pages)
5.DSPIC30F6011A-30IPT.pdf
(10 pages)
6.DSPIC30F6011A-30IPT.pdf
(6 pages)
7.DSPIC30F6011A-30IPT.pdf
(8 pages)
8.DSPIC30F6011A-30IPT.pdf
(16 pages)
9.DSPIC30F6011A-30IPF.pdf
(236 pages)
Specifications of DSPIC30F6011A-30I/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
132KB (44K x 24)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
52
Flash Memory Size
132KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6011A-30I/PF
Manufacturer:
MICROCHIP
Quantity:
966
Company:
Part Number:
DSPIC30F6011A-30I/PF
Manufacturer:
MICROCHIP
Quantity:
316
Company:
Part Number:
DSPIC30F6011A-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC30F6011A/6012A/6013A/6014A
Output Compare Module..................................................... 85
Output Compare Operation During CPU Idle Mode............ 88
Output Compare Sleep Mode Operation............................. 88
P
Packaging Information ...................................................... 213
Peripheral Module Disable (PMD) Registers .................... 159
Pinout Descriptions ............................................................. 14
POR. See Power-on Reset.
PORTA
PORTB
PORTC
PORTD
PORTF
PORTG
Power Saving Modes
Power-Down Current (I
Power-on Reset (POR) ..................................................... 143
Power-Saving Modes ........................................................ 157
Power-Saving Modes (Sleep and Idle).............................. 143
Power-up Timer
Program Address Space ..................................................... 25
Program and EEPROM Characteristics ............................ 182
Program Counter................................................................. 18
Programmable................................................................... 143
Programmer’s Model........................................................... 18
Programming Operations .................................................... 53
DS70143E-page 228
Register Map............................................................... 89
Timing Characteristics .............................................. 193
Timing Requirements ................................................ 193
Marking ..................................................................... 213
Register Map for dsPIC30F6013A/6014A................... 63
Register Map for dsPIC30F6011A/6012A/6013A/6014A
Register Map for dsPIC30F6011A/6012A................... 63
Register Map for dsPIC30F6013A/6014A................... 63
Register Map for dsPIC30F6011A/6012A................... 64
Register Map for dsPIC30F6013A/6014A................... 64
Register Map for dsPIC30F6011A/6012A................... 64
Register Map for dsPIC30F6013A/6014A................... 64
Register Map for dsPIC30F6011A/6012A/6013A/
Idle ............................................................................ 158
Sleep ......................................................................... 157
Oscillator Start-up Timer (OST) ................................ 143
Power-up Timer (PWRT) .......................................... 143
Timing Characteristics .............................................. 188
Timing Requirements ................................................ 189
Construction ................................................................ 27
Data Access from Program Memory
Data Access from Program Memory
Data Access from, Address Generation...................... 27
Data Space Window into Operation ............................ 30
Data Table Access (Least Significant Word) .............. 28
Data Table Access (MSB)........................................... 29
Memory Map for dsPIC30F6011A/6013A ................... 26
Memory Map for dsPIC30F6012A/6014A ................... 26
Table Instructions
Diagram ...................................................................... 19
Algorithm for Program Flash ....................................... 53
63
6014A.................................................................. 65
Using Program Space Visibility........................... 29
Using Table Instructions ..................................... 28
TBLRDH.............................................................. 28
TBLRDL .............................................................. 28
TBLWTH ............................................................. 28
TBLWTL.............................................................. 28
PD
) ................................................ 178
Protection Against Accidental Writes to OSCCON ........... 149
R
Reader Response............................................................. 228
Reset ........................................................................ 143, 153
Reset Sequence ................................................................. 47
Reset Sources
Reset Timing Characteristics............................................ 188
Reset Timing Requirements ............................................. 189
Resets
RTSP Operation ................................................................. 52
Run-Time Self-Programming (RTSP) ................................. 51
S
Serial Peripheral Interface. See SPI
Simple Capture Event Mode............................................... 81
Simple OC/PWM Mode Timing Requirements ................. 194
Simple Output Compare Match Mode ................................ 86
Simple PWM Mode ............................................................. 86
Software Simulator (MPLAB SIM) .................................... 171
Software Stack Pointer, Frame Pointer .............................. 18
SPI Module ......................................................................... 91
STATUS Register ............................................................... 18
Symbols used in Opcode Descriptions ............................. 162
System Integration............................................................ 143
Erasing a Row of Program Memory............................ 53
Initiating the Programming Sequence......................... 54
Loading Write Latches ................................................ 54
Reset Sources ............................................................ 47
Brown-out Reset (BOR).............................................. 47
Illegal Instruction Trap ................................................ 47
Trap Lockout............................................................... 47
Uninitialized W Register Trap ..................................... 47
Watchdog Time-out .................................................... 47
Brown-out Rest (BOR), Programmable .................... 155
POR with Long Crystal Start-up Time....................... 155
POR, Operating without FSCM and PWRT .............. 155
Power-on Reset (POR)............................................. 153
Buffer Operation ......................................................... 82
Hall Sensor Mode ....................................................... 82
Prescaler .................................................................... 81
Timer2 and Timer3 Selection Mode............................ 82
Input Pin Fault Protection ........................................... 86
Period ......................................................................... 87
CALL Stack Frame ..................................................... 35
Framed SPI Support ................................................... 92
Operating Function Description .................................. 91
Operation During CPU Idle Mode ............................... 93
Operation During CPU Sleep Mode............................ 93
SDOx Disable ............................................................. 91
Slave Select Synchronization ..................................... 93
SPI1 Register Map...................................................... 94
SPI2 Register Map...................................................... 94
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 91
Register Map for dsPIC30F601xA ............................ 160
Master Mode (CKE = 0).................................... 198
Master Mode (CKE = 1).................................... 199
Slave Mode (CKE = 1).............................. 200, 201
Master Mode (CKE = 0).................................... 198
Master Mode (CKE = 1).................................... 199
Slave Mode (CKE = 0)...................................... 200
Slave Mode (CKE = 1)...................................... 202
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