ATSAM3U2CA-CU Atmel, ATSAM3U2CA-CU Datasheet - Page 786
ATSAM3U2CA-CU
Manufacturer Part Number
ATSAM3U2CA-CU
Description
IC MCU 32BIT 128KB FLSH 100TFBGA
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2CA-CU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
57
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b, 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
3xUSART, TWI, 4xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
57
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3U2CA-CU
Manufacturer:
PERICOM
Quantity:
3 186
Part Number:
ATSAM3U2CA-CU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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36.7.8
Name:
Address:
Access:
• TCCLKS: Clock Selection
• CLKI: Clock Invert
0 = counter is incremented on rising edge of the clock.
1 = counter is incremented on falling edge of the clock.
• BURST: Burst Signal Selection
• LDBSTOP: Counter Clock Stopped with RB Loading
0 = counter clock is not stopped when RB loading occurs.
1 = counter clock is stopped when RB loading occurs.
786
786
LDBDIS
Value
Value
WAVE
0
1
2
3
4
5
6
7
0
1
2
3
31
23
15
–
–
7
SAM3U Series
SAM3U Series
TC Channel Mode Register: Capture Mode
Name
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
XC0
XC1
XC2
Name
NONE
XC0
XC1
XC2
LDBSTOP
CPCTRG
30
22
14
TC_CMRx [x=0..2] (WAVE = 0)
0x40080004 (0)[0], 0x40080044 (0)[1], 0x40080084 (0)[2]
Read-write
–
–
6
Description
Clock selected: TCLK1
Clock selected: TCLK2
Clock selected: TCLK3
Clock selected: TCLK4
Clock selected: TCLK5
Clock selected: XC0
Clock selected: XC1
Clock selected: XC2
Description
The clock is not gated by an external signal.
XC0 is ANDed with the selected clock.
XC1 is ANDed with the selected clock.
XC2 is ANDed with the selected clock.
29
21
13
–
–
–
5
BURST
28
20
12
–
–
–
4
CLKI
27
19
11
–
–
3
LDRB
ABETRG
26
18
10
–
2
TCCLKS
25
17
–
9
1
ETRGEDG
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
LDRA
24
16
–
8
0
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