AT32UC3A0512-ALUT Atmel, AT32UC3A0512-ALUT Datasheet - Page 758
AT32UC3A0512-ALUT
Manufacturer Part Number
AT32UC3A0512-ALUT
Description
IC MCU AVR32 512KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A0512-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Package
144LQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
66 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
69
Interface Type
Ethernet/I2S/JTAG/SPI/TWI/USART
Number Of Timers
3
Processor Series
AT32UC3x
Core
AVR32
Data Ram Size
64 KB
Maximum Clock Frequency
66 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105, ATAVRRZ600
Minimum Operating Temperature
- 40 C
For Use With
ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
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Quantity:
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36.9.11
32058J–AVR32–04/11
HALT
devices without non-volatile memories this instruction does nothing, and appears to complete
immediately.
The erasing of non-volatile memories starts as soon as the CHIP_ERASE instruction is selected.
The CHIP_ERASE instruction selects a 1 bit bypass data register.
A chip erase operation should be performed as:
Table 36-14. CHIP_ERASE details
This instruction allows a programmer to easily stop the CPU to ensure that it does not execute
invalid code during programming.
This instruction selects a 1-bit halt register. Setting this bit to one halts the CPU. Setting this bit
to zero releases the CPU to run normally. The value shifted out from the data register is one if
the CPU is halted.
The HALT instruction can be used in the following way:
Instructions
IR input value
IR output value
DR Size
DR input value
DR output value
1. Scan in the HALT instruction
2. Scan in the value 1 to halt the CPU
3. Stay in Run-Test/Idle for 10 TCK cycles to let the halt command propagate properly
4. Scan in the CHIP_ERASE instruction
5. Keep scanning the CHIP_ERASE instruction until the busy bit is cleared and the pro-
6. Scan in the HALT instruction
7. Scan in the value 0 to release the CPU
8. Return to Run-Test/Idle
9. Stay in Run-Test/Idle for 10 TCK cycles to let the halt command propagate properly.
10. Scan in the value 1 to halt the CPU
11. Stay in Run-Test/Idle for 10 TCK cycles to let the command propagate properly
12. Use any MEMORY_* instructions to program the device
13. Scan in the HALT instruction
14. Scan in the value 0 to release the CPU
15. Return to Run-Test/Idle
tection bit is cleared.
Details
01111 (0x0F)
p0b01
Where b is the busy bit.
1 bit
x
0
AT32UC3A
758
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