P87C51RC2BBD,157 NXP Semiconductors, P87C51RC2BBD,157 Datasheet - Page 10

• Manufacturer Part Number: P87C51RC2BBD,157
• Description: IC 80C51 MCU 512 RAM 44LQFP
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C51RC2BBD,157

• Program Memory Type: OTP
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Processor Series: P87C51
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Package: 44LQFP
• Device Core: 80C51
• Family Name: 87C
• Maximum Speed: 33 MHz
• Cpu Family: 87C
• Device Core Size: 8b
• Frequency (max): 33MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10064 - EMULATOR 80C51 PDS51-MK2
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935272152157; P87C51RC2BBD; P87C51RC2BBD

*
# SFRs are modified from or added to the 80C51 SFRs.
– Reserved bits.
Philips Semiconductors
SPECIAL FUNCTION REGISTERS (Continued)
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output, respectively, of an
inverting amplifier. The pins can be configured for use as an
on-chip oscillator.
To drive the device from an external clock source, XTAL1 should be
driven while XTAL2 is left unconnected. Minimum and maximum
high and low times specified in the data sheet must be observed.
2003 Jan 24
SYMBOL
PSW*
RCAP2H#
RCAP2L#
SADDR#
SADEN#
SBUF
SCON*
SP
TCON*
T2CON*
T2MOD#
TH0
TH1
TH2#
TL0
TL1
TL2#
TMOD
WDTRST
80C51 8-bit microcontroller family
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
SFRs are bit addressable.
Program Status Word
Timer 2 Capture High
Timer 2 Capture Low
Slave Address
Slave Address Mask
Serial Data Buffer
Serial Control
Stack Pointer
Timer Control
Timer 2 Control
Timer 2 Mode Control
Timer High 0
Timer High 1
Timer High 2
Timer Low 0
Timer Low 1
Timer Low 2
Timer Mode
Watchdog Timer Reset
DESCRIPTION
ADDRESS
DIRECT
CDH
CCH
D0H
CBH
CAH
C8H
C9H
8CH
8DH
A9H
B9H
99H
98H
81H
88H
8AH
8BH
89H
A6H
8KB/16KB/32KB/64KB OTP
MSB
SM0/FE
GATE
TF1
TF2
CY
CF
D7
9F
8F
–
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
EXF2
SM1
TR1
C/T
AC
CE
D6
9E
8E
–
10
RCLK
SM2
TF0
CD
D5
9D
8D
M1
F0
–
This device is configured at the factory to operate using 12 clock
periods per machine cycle, referred to in this datasheet as “12-clock
mode”. It may be optionally configured on commercially available
parallel programming equipment or via software to operate at
6 clocks per machine cycle, referred to in this datasheet as “6-clock
mode”. (This yields performance equivalent to twice that of standard
80C51 family devices). Also see next page.
TCLK
REN
RS1
TR0
CC
M0
D4
9C
8C
–
EXEN2
GATE
P87C51RA2/RB2/RC2/RD2
RS0
TB8
IE1
CB
D3
9B
8B
–
RB8
TR2
C/T
OV
IT1
CA
D2
9A
8A
–
T2OE
C/T2
IE0
D1
C9
M1
F1
99
89
TI
CP/RL2
DCEN
IT0
LSB
D0
C8
M0
98
88
RI
P
00000000B
00H
00H
00H
00H
xxxxxxxxB
00H
07H
00H
00H
xxxxxx00B
00H
00H
00H
00H
00H
00H
00H
Product data
RESET
VALUE