P87C51RC2BBD,157 NXP Semiconductors, P87C51RC2BBD,157 Datasheet - Page 35

• Manufacturer Part Number: P87C51RC2BBD,157
• Description: IC 80C51 MCU 512 RAM 44LQFP
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C51RC2BBD,157

• Program Memory Type: OTP
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Processor Series: P87C51
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Package: 44LQFP
• Device Core: 80C51
• Family Name: 87C
• Maximum Speed: 33 MHz
• Cpu Family: 87C
• Device Core Size: 8b
• Frequency (max): 33MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10064 - EMULATOR 80C51 PDS51-MK2
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935272152157; P87C51RC2BBD; P87C51RC2BBD

Philips Semiconductors
2003 Jan 24
80C51 8-bit microcontroller family
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
NOTE:
* User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset or inactive
** f
NOTE:
* User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset or inactive
Symbol
CIDL
WDTE
–
CPS1
CPS0
ECF
Symbol
CF
CR
–
CCF4
CCF3
CCF2
CCF1
CCF0
value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
OSC
= oscillator frequency
Bit:
Bit Addressable
Bit:
Function
Counter Idle control: CIDL = 0 programs the PCA Counter to continue functioning during idle Mode. CIDL = 1 programs
it to be gated off during idle.
Watchdog Timer Enable: WDTE = 0 disables Watchdog Timer function on PCA Module 4. WDTE = 1 enables it.
Not implemented, reserved for future use.*
PCA Count Pulse Select bit 1.
PCA Count Pulse Select bit 0.
CPS1
PCA Enable Counter Overflow interrupt: ECF = 1 enables CF bit in CCON to generate an interrupt. ECF = 0 disables
that function of CF.
Function
PCA Counter Overflow flag. Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in CMOD is
set. CF may be set by either hardware or software but can only be cleared by software.
PCA Counter Run control bit. Set by software to turn the PCA counter on. Must be cleared by software to turn the PCA
counter off.
Not implemented, reserved for future use*.
PCA Module 4 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 3 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 2 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 1 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
PCA Module 0 interrupt flag. Set by hardware when a match or capture occurs. Must be cleared by software.
CMOD Address = D9H
0
0
1
1
CCON Address = D8H
CIDL
7
CF
7
CPS0
0
1
0
1
WDTE
Selected PCA Input**
CR
6
6
0
1
2
3
8KB/16KB/32KB/64KB OTP
Figure 23. CCON: PCA Counter Control Register
Figure 22. CMOD: PCA Counter Mode Register
–
5
Internal clock, f
Internal clock, f
Timer 0 overflow
External clock at ECI/P1.2 pin
5
–
(max. rate = f
CCF4
–
4
4
OSC
OSC
OSC
/6 in 6-clock mode (f
/2 in 6-clock mode (f
/4 in 6-clock mode, f
35
CCF3
–
3
3
CPS1
CCF2
2
2
OSC
OSC
OCS
P87C51RA2/RB2/RC2/RD2
CCF1
/12 in 12-clock mode)
/4 in 12-clock mode)
CPS0
/8 in 12-clock mode)
1
1
CCF0
ECF
0
0
Reset Value = 00XX X000B
Reset Value = 00X0 0000B
SU01318
SU01319
Product data