Z86E0208HSG1925 Zilog, Z86E0208HSG1925 Datasheet - Page 44

• Manufacturer Part Number: Z86E0208HSG1925
• Description: IC Z8 .5K OTP 8MHZ 20-SSOP
• Manufacturer: Zilog
• Series: Z8®r

Specifications of Z86E0208HSG1925

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: POR, WDT
• Number Of I /o: 14
• Program Memory Size: 512B (512 x 8)
• Program Memory Type: OTP
• Ram Size: 61 x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Processor Series: Z86E02x
• Core: Z8
• Data Bus Width: 8 bit
• Data Ram Size: 61 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 1
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3946; Z86E0208HSG1925

PS014802-0903
Software Work Around on the Z86CCP01ZEM Emulator
to Enable P27 as Stop-Mode Recovery Source
Watch-Dog Timer (WDT)
SWFIXP27:
Note:
Note:
To enter STOP or HALT mode, it is necessary to first flush the instruction pipeline
to avoid suspending execution in mid-instruction. The user must execute a NOP
(Op Code = FFh) immediately before the appropriate SLEEP instruction, such as:
The Watch-Dog Timer is enabled by instruction WDT. When the WDT is enabled,
it cannot be stopped by the instruction. With the WDT instruction, the WDT is
refreshed when it is enabled within every 1 T
resets itself, The WDT instruction affects the flags accordingly; Z = 1, S = 0, V = 0.
FFh
6Fh
FFH
7Fh
WDT = 5Fh
Any Low level detected on pin P27 takes the device out of
STOP mode, even if it is configured as an output. It is not edge
triggered.
On the CCP emulator, a software workaround must be used to
enable P27 as the Stop-Mode Recovery source. This
workaround follows.
PUSH RP
LD RP, #0Fh
LD R012, #001101X0B
POP RP
NOP
STOP
or
NOP
HALT
General-Purpose OTP MCU with 14 I/O Lines
X= 1 for LOW EMI Mode
X= 0 for STANDARD Mode
; clear the pipeline
; enter STOP mode
; clear the pipeline
; enter HALT mode
WDT
period; otherwise, the controller
Z86E02 SL 1925
38