ST72C254G2M6 STMicroelectronics, ST72C254G2M6 Datasheet - Page 38

• Manufacturer Part Number: ST72C254G2M6
• Description: IC MCU 8BIT 8K FLASH SOIC-28
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72C254G2M6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3.2 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: ST7
• No. Of I/o's: 22
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: ST72C2x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDT1-DVP2/US
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: In Transition

ST72104G, ST72215G, ST72216G, ST72254G
MISCELLANEOUS REGISTERS (Cont’d)
MISCELLANEOUS REGISTER 2 (MISCR2)
Read /Write
Reset Value: 0000 0000 (00h)
Bit 7:4 = Reserved always read as 0
Bit 3 = MOD SPI Master Output Disable
This bit is set and cleared by software. When set, it
disables the SPI Master (MOSI) output signal.
0: SPI Master Output enabled.
1: SPI Master Output disabled.
Bit 2 = SOD SPI Slave Output Disable
This bit is set and cleared by software. When set it
disable the SPI Slave (MISO) output signal.
0: SPI Slave Output enabled.
1: SPI Slave Output disabled.
Bit 1 = SSM SS mode selection
This bit is set and cleared by software.
0: Normal mode - the level of the SPI SS signal is
1: I/O mode, the level of the SPI SS signal is read
Bit 0 = SSI SS internal mode
This bit replaces the SS pin of the SPI when the
SSM bit is set to 1. (see SPI description). It is set
and cleared by software.
Table 10. Miscellaneous Register Map and Reset Values
38/140
Address
input from the external SS pin.
from the SSI bit.
7
0
(Hex.)
0020h
0040h
0
MISCR1
Reset Value
MISCR2
Reset Value
Register
0
Label
0
MOD SOD SSM
IS11
7
0
0
IS10
6
0
0
SSI
0
MCO
5
0
0
IS01
4
0
0
MOD
IS00
3
0
0
SOD
CP1
2
0
0
SSM
CP0
1
0
0
SMS
SSI
0
0
0