Z86C9620VSC Zilog, Z86C9620VSC Datasheet - Page 27

IC Z8 20MHZ C91 W/7 PORTS 68PLCC

Z86C9620VSC

Manufacturer Part Number
Z86C9620VSC
Description
IC Z8 20MHZ C91 W/7 PORTS 68PLCC
Manufacturer
Zilog
Series
Z8®r
Datasheet

Specifications of Z86C9620VSC

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
EBI/EMI, UART/USART
Number Of I /o
52
Program Memory Type
ROMless
Ram Size
236 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Peripherals
-

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FUNCTIONAL DESCRIPTION
Address Space
Program Memory. The Z86C61/62 can address up to 48
KB of external program memory (Figure 19). The first 12
bytes of program memory are reserved for the interrupt
vectors. These locations contain six 16-bit vectors that cor-
respond to the six available interrupts. For ROM mode,
byte 13 to byte 16383 consists of on-chip ROM. At ad-
dresses 16384 and greater, the Z86C61/62 executes ex-
ternal program memory fetches. The Z86C96, and the
Z86C61/62 in ROMless mode, can address up to 64 KB of
external program memory. Program execution begins at
external location 000CH after a reset.
DS97Z8X1600
After RESET
(Lower Byte)
(Upper Byte)
First Byte of
Location of
Instruction
Figure 19. Program Memory Configuration
Executed
Interrupt
Interrupt
Vector
Vector
16384
16383
65535
12
11
10
9
8
7
6
5
4
3
2
1
0
ROM and RAM
On-Chip ROM
External
IRQ5
IRQ5
IRQ4
IRQ4
IRQ3
IRQ3
IRQ2
IRQ2
IRQ1
IRQ1
IRQ0
IRQ0
PS003501-0301
P R E L I M I N A R Y
Data Memory (/DM). The ROM version can address up to
48 KB of external data memory space beginning at loca-
tion 16384. The ROMless version can address up to 64 KB
of external data memory. External data memory may be in-
cluded with, or separated from, the external program
memory space. /DM, an optional I/O function that can be
programmed to appear on pin P34, is used to distinguish
between data and program memory space (Figure 20).
The state of the /DM signal is controlled by the type in-
struction being executed. An LDC opcode references
PROGRAM (/DM inactive) memory, and an LDE instruc-
tion references DATA (/DM active Low) memory.
Figure 20. Data Memory Configuration
16384
16383
65535
0
Not Addressable
External
Memory
CMOS Z8 Microcontroller
Data
Z86C61/62/96
27
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