S9S08SG4E2CSC Freescale Semiconductor, S9S08SG4E2CSC Datasheet - Page 163

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S9S08SG4E2CSC

Manufacturer Part Number
S9S08SG4E2CSC
Description
MCU 4K FLASH 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08SG4E2CSC

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
4
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
S08SG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
On-chip Dac
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Refer to the direct-page register summary in the
assignments for all IIC registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
11.3.1
11.3.2
Freescale Semiconductor
Reset
Reset
AD[7:1]
Field
7–1
W
W
R
R
IIC Address Register (IICA)
IIC Frequency Divider Register (IICF)
AD7
Slave Address. The AD[7:1] field contains the slave address to be used by the IIC module. This field is used on
the 7-bit address scheme and the lower seven bits of the 10-bit address scheme.
0
0
7
7
MULT
= Unimplemented or Reserved
AD6
0
0
6
6
Figure 11-4. IIC Frequency Divider Register (IICF)
Figure 11-3. IIC Address Register (IICA)
MC9S08SG8 MCU Series Data Sheet, Rev. 6
Table 11-2. IICA Field Descriptions
AD5
0
0
5
5
memory
AD4
0
0
4
4
Description
chapter of this document for the absolute address
AD3
3
0
3
0
ICR
Chapter 11 Inter-Integrated Circuit (S08IICV2)
AD2
0
0
2
2
AD1
0
0
1
1
0
0
0
0
0
163

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