S9S08SG16E1VTL Freescale Semiconductor, S9S08SG16E1VTL Datasheet - Page 133

• Manufacturer Part Number: S9S08SG16E1VTL
• Description: MCU 16K FLASH 28-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08SG16E1VTL

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-TSSOP
• Processor Series: S08SG
• Core: HCS08
• Data Bus Width: 8 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

the intermediate conversion data is lost. In 8-bit mode, there is no interlocking with ADCRH. If the MODE
bits are changed, any data in ADCRL becomes invalid.
9.3.5
In 10-bit mode, the ADCCVH register holds the upper two bits of the 10-bit compare value (ADCV[9:8]).
When the compare function is enabled, these bits are compared to the upper two bits of the result following
a conversion in 10-bit mode.
In 8-bit operation, ADCCVH is not used during compare.
9.3.6
The ADCCVL register holds the lower eight bits of the 10-bit compare value or all eight bits of the 8-bit
compare value. When the compare function is enabled, bits ADCV[7:0] are compared to the lower eight
bits of the result following a conversion in 10-bit or 8-bit mode.
9.3.7
ADCCFG selects the mode of operation, clock source, clock divide, and configures for low power and long
sample time.
Freescale Semiconductor
Reset:
Reset:
Reset:
W
W
R
R
W
R
Compare Value High Register (ADCCVH)
Compare Value Low Register (ADCCVL)
Configuration Register (ADCCFG)
ADCV7
ADR7
7
0
7
0
0
7
0
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 9-7. Compare Value High Register (ADCCVH)
Figure 9-8. Compare Value Low Register (ADCCVL)
ADCV6
ADR6
0
0
6
Figure 9-6. Data Result Low Register (ADCRL)
0
0
6
6
MC9S08SG32 Data Sheet, Rev. 8
ADCV5
ADR5
0
0
5
0
0
5
5
ADCV4
ADR4
0
0
4
0
0
4
4
ADCV3
ADR3
0
3
Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
0
0
3
3
ADCV2
ADR2
0
2
0
0
2
2
ADCV9
ADCV1
ADR1
0
1
0
0
1
1
ADCV8
ADCV0
ADR0
0
0
0
0
0
0
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