S9S08SG16E1VTL Freescale Semiconductor, S9S08SG16E1VTL Datasheet - Page 173

• Manufacturer Part Number: S9S08SG16E1VTL
• Description: MCU 16K FLASH 28-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08SG16E1VTL

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-TSSOP
• Processor Series: S08SG
• Core: HCS08
• Data Bus Width: 8 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.1.2
Key features of the ICS module follow. For device specific information, refer to the ICS Characteristics in
the Electricals section of the documentation.
11.1.3
Figure 11-2
Freescale Semiconductor
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Frequency-locked loop (FLL) is trimmable for accuracy using the internal 32 kHz reference over
the specified temperature and voltage ranges
— 0.1% resolution using 9-bit TRIM:FTRIM
— 1.5% deviation for
— 3% deviation for AEC Grade 0 high-temperature rated devices (-40 to 150
Internal or external reference clocks up to 5 MHz can be used to control the FLL
— 3-bit select for reference divider is provided
Internal reference clock has 9 trim bits available
Internal or external reference clocks can be selected as the clock source for the MCU
Whichever clock is selected as the source can be divided down
— 2-bit select for clock divider is provided
Control signals for a low power oscillator as the external reference clock are provided
— HGO, RANGE, EREFS, ERCLKEN, EREFSTEN
FLL Engaged Internal mode is automatically selected out of reset
– Allowable dividers are: 1, 2, 4, 8
– BDC clock is provided as a constant divide by 2 of the DCO output
Features
Block Diagram
is the ICS block diagram.
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40
°
C to 125
MC9S08SG32 Data Sheet, Rev. 8
°
C standard-temperature rated devices
Chapter 11 Internal Clock Source (S08ICSV2)
°
C)
173