C8051T630-GM Silicon Laboratories Inc, C8051T630-GM Datasheet - Page 12
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C8051T630-GM
Manufacturer Part Number
C8051T630-GM
Description
IC MCU 8KB 20PIN QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T63xr
Specifications of C8051T630-GM
Program Memory Type
OTP
Program Memory Size
8KB (8K x 8)
Package / Case
20-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T630DK
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1464 - KIT DEV FOR C8051T630 FAMILY
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1458-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T630-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
C8051T630/1/2/3/4/5
List of Registers
SFR Definition 6.1. ADC0CF: ADC0 Configuration ...................................................... 37
SFR Definition 6.2. ADC0H: ADC0 Data Word MSB .................................................... 38
SFR Definition 6.3. ADC0L: ADC0 Data Word LSB ...................................................... 38
SFR Definition 6.4. ADC0CN: ADC0 Control ................................................................ 39
SFR Definition 6.5. ADC0GTH: ADC0 Greater-Than Data High Byte .......................... 40
SFR Definition 6.6. ADC0GTL: ADC0 Greater-Than Data Low Byte ............................ 40
SFR Definition 6.7. ADC0LTH: ADC0 Less-Than Data High Byte ................................ 41
SFR Definition 6.8. ADC0LTL: ADC0 Less-Than Data Low Byte ................................. 41
SFR Definition 6.9. AMX0P: AMUX0 Positive Channel Select ..................................... 44
SFR Definition 7.1. TOFFH: Temperature Offset Measurement High Byte .................. 47
SFR Definition 7.2. TOFFL: Temperature Offset Measurement Low Byte ................... 47
SFR Definition 8.1. IDA0CN: IDA0 Control ................................................................... 50
SFR Definition 8.2. IDA0H: IDA0 Data Word MSB ....................................................... 51
SFR Definition 8.3. IDA0L: IDA0 Data Word LSB ......................................................... 51
SFR Definition 9.1. REF0CN: Reference Control ......................................................... 54
SFR Definition 10.1. REG0CN: Voltage Regulator Control .......................................... 56
SFR Definition 11.1. CPT0CN: Comparator0 Control ................................................... 59
SFR Definition 11.2. CPT0MD: Comparator0 Mode Selection ..................................... 60
SFR Definition 11.3. CPT0MX: Comparator0 MUX Selection ...................................... 62
SFR Definition 12.1. DPL: Data Pointer Low Byte ........................................................ 69
SFR Definition 12.2. DPH: Data Pointer High Byte ....................................................... 69
SFR Definition 12.3. SP: Stack Pointer ......................................................................... 70
SFR Definition 12.4. ACC: Accumulator ....................................................................... 70
SFR Definition 12.5. B: B Register ................................................................................ 70
SFR Definition 12.6. PSW: Program Status Word ........................................................ 71
SFR Definition 13.1. EMI0CN: External Memory Interface Control .............................. 75
SFR Definition 15.1. IE: Interrupt Enable ...................................................................... 83
SFR Definition 15.2. IP: Interrupt Priority ...................................................................... 84
SFR Definition 15.3. EIE1: Extended Interrupt Enable 1 .............................................. 85
SFR Definition 15.4. EIP1: Extended Interrupt Priority 1 .............................................. 86
SFR Definition 15.5. IT01CF: INT0/INT1 Configuration ................................................ 88
SFR Definition 17.1. PCON: Power Control .................................................................. 94
SFR Definition 18.1. VDM0CN: VDD Monitor Control .................................................. 98
SFR Definition 18.2. RSTSRC: Reset Source ............................................................ 100
SFR Definition 19.1. CLKSEL: Clock Select ............................................................... 102
SFR Definition 19.2. OSCICL: Internal H-F Oscillator Calibration .............................. 103
SFR Definition 19.3. OSCICN: Internal H-F Oscillator Control ................................... 104
SFR Definition 19.4. OSCLCN: Internal L-F Oscillator Control ................................... 105
SFR Definition 19.5. OSCXCN: External Oscillator Control ........................................ 107
SFR Definition 20.1. XBR0: Port I/O Crossbar Register 0 .......................................... 117
SFR Definition 20.2. XBR1: Port I/O Crossbar Register 1 .......................................... 118
SFR Definition 20.3. P0MASK: Port 0 Mask Register ................................................. 119
SFR Definition 20.4. P0MAT: Port 0 Match Register .................................................. 119
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Rev. 1.0