MC9S08SH8CTG Freescale Semiconductor, MC9S08SH8CTG Datasheet - Page 186

• Manufacturer Part Number: MC9S08SH8CTG
• Description: IC MCU 8BIT 8K FLASH 16-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08SH8CTG

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-TSSOP
• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 512Byte
• # I/os (max): 13
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Processor Series: S08SH
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
• Minimum Operating Temperature: - 40 C
• For Use With: DEMO9S08SH8 - BOARD DEMO FOR MC9S08SH FAM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Chapter 12 Modulo Timer (S08MTIMV1)
12.1.4
The block diagram for the modulo timer module is shown
12.2
The MTIM includes one external signal, TCLK, used to input an external clock when selected as the
MTIM clock source. The signal properties of TCLK are shown in
The TCLK input must be synchronized by the bus clock. Also, variations in duty cycle and clock jitter must
be accommodated. Therefore, the TCLK signal must be limited to one-fourth of the bus frequency.
The TCLK pin can be muxed with a general-purpose port pin. See the
the pin location and priority of this function.
186
BUSCLK
XCLK
TCLK
MTIM
INTERRUPT
REQUEST
External Signal Description
Block Diagram
set_tof_pulse
SYNC
TOIE
Figure 12-2. Modulo Timer (MTIM) Block Diagram
Signal
TCLK
SOURCE
SELECT
CLOCK
REG
TOF
CLKS
MC9S08SH8 MCU Series Data Sheet, Rev. 3
Table 12-1. Signal Properties
External clock source input into MTIM
AND SELECT
PRESCALE
DIVIDE BY
PS
Function
Figure
12-2.
Table
8-BIT COMPARATOR
Pins and Connections
12-1.
8-BIT COUNTER
8-BIT MODULO
(MTIMMOD)
(MTIMCNT)
I/O
I
Freescale Semiconductor
chapter for
TRST
TSTP